Cryogenic etching reduces plasma-induced damage of ultralow-k dielectrics Reducing plasma-induced damage is key to advancing the scaling limits. BY MIKHAIL BAKLANOV, JEAN-FRANCOIS DE MARNEFFE, LIPING ZHANG, IVAN CIOFI and ZSOLT TOKEI, imec, Leuven, Belgium As semiconductor technology scales below the 20nm node, the capacitance between nearby metal lines increases and this results in loss of speed and cross-talk of the device. To control this unwanted increase in capacitance, insulating layers of porous low-k dielectrics are integrated through plasma etching. Porous organosilicate glasses (or OSGs) are the most popular dielectric materials, but their integration is very challenging. During plasma processing (such as patterning, surface cleaning and resist strip), the porous low-k material suffers from plasma-induced damage which degrades its k value and causes high leakage currents. The damage occurs through depletion of the methyl groups (Si-CH3) which are very sensitive to the active species (radicals, ions and photons) present in the plasma. FIGURE 1. X-TEM picture of a cryo-etch damascene structure. A new cryogenic etch method To bypass these damages, imec researchers have developed a cryogenic low-k etching method. By applying cryogenic temperatures (below -70°C), etch-by products condense and seal the open pores against radical diffusion. Cryogenic etching allows IC manufacturers to reach scaling levels of 20nm and beyond, without compromising speed and device cross-talk. The new method is a good alternative to pore stuffing by sacrificial polymers, which today is intensively studied as a possible way of reducing plasma damage. Pore stuffing is certainly interesting, but has several challenges, namely its impact on the process flow and the possible deformation of the low-k film. Setting up the experiments Damage reduction by cryogenic etching was studied in more detail by applying the new method to different OSG films (different dielectric constants and pore structures), and by using different temperatures and etching chemistries. The researchers used a plasma-enhanced chemical vapor deposited (PECVD) OSG-2.0 material with a k value of 2.05 (referred to as ALKB), and a spin-on deposited OSG-2.3 material with a k value of about 2.3 (referred to as NCS). In the experiments, the temperature of the wafer could be varied between -150°C and 40°C by using a liquid nitrogen circulation system and a heating element. Different etching gasses were used, namely SF6, SiF4, O2 and mixtures of these gasses. They used zero bias power to simulate the etching condition along the trench sidewall, and 150W bias power to gain information on the trench bottom. FIGURE 2. k value (at 100MHz) extracted from capacitance measurements for OSG-2.0 films etched by pure SF6 plasma (a) and SiF4/O2/SF6 plasma (b) at different substrate holder temperatures. Black bars represent the recipe with high bias power to simulate bottom etching, gray bars represent the recipe with 0W bias power to simulate sidewall condition. These results confirm the reduced dielectric degradation at cryogenic temperatures. Outcome and protection mechanism When a SF6 plasma was used, almost no methyl groups depletion (visible as a smaller decrease of the Si-CH3 peaks) was observed when the wafer temperature was below a certain critical level. This observation holds for both bias conditions, and is a first indication of a lower plasma-induced damage. Further investigations reveal that alcohol-like etch by-products are formed at cryogenic temperatures. These reaction products retard the oxidation of the methyl groups, condense on the low-k surface, diffuse into the pores and fill the interconnected pores. These deposited etch by-products protect the low-k films from plasma damage. The etch condensate remains at room temperature, and can be easily removed by high temperature annealing without additional damage to the low-k material. K-value extraction based on capacitance measurements confirms the reduced dielectric degradation at cryogenic tempera- tures. The plasma-induced damage can even be further reduced by adding SiF4 and O2 into the gas discharge. When using this SiF4/O2/SF6 gas mixture, an additional SiOxFy-like passivation layer is deposited which can efficiently protect the dielectric surface. FIGURE 3. Cross-section transmission electron microscopy (X-TEM) image of a cryo-etch damascene structure. The integrated k value was measured to be 2.38, while the pristine k value was 2.31.The resulting Delta-k is 0.07, which is the lowest Delta-k that has ever been achieved for ultralow-k materials. A threshold temperature, depending on pore size and porosity The researchers also found that these phenomena occur below a critical wafer temperature and that this temperature depends on the porosity and pore size of the low-k material. While for the ALKB material (open porosity 46% and pore diameter 3.0nm), carbon depletion is suppressed at temperatures lower than -70°C, a temperature lower than -120°C is needed to suppress carbon depletion within the NCS material (open porosity 35% and pore diameter 2.0nm). This dependence is explained by the Kelvin equation predicting that the vapor condensation in pores happens at critical relative pressures which depend on the pore size. Pattern transfer and future outlook We are currently developing a modified approach, in which initial reactants are condensed instead of etch by-products. First results are very promising for industrial take up, since etch temperatures can be increased up to -50°C. Also, the pattern transfer capabilities of cryogenic etching are being investigated. This includes a study of the mechanism of hard-mask preservation at cryogenic temperatures. The final goal is an accurate and complete pattern transfer, up to the bottom of the OSG film. Acknowledgement It is our great pleasure to thank our colleagues from GREMI Orleans (France) and Oxford Instru- ments (UK) for the joint experiments and for the possibility to use their cryogenic etch equipment. References 1. M.R.Baklanov, F.Iacopi, S.Vanhaelemeersch. Patent US 8,540,890 B2, Sep. 24, 2013. 2. L. Zhang, R. Ljazouli, P. Lefaucheux, T. Tillocher, R. Dussart,Y. A. Mankelevich, J.-F.de Marneffe, S. de Gendt and M. R. Baklanov. ECS Sol. St. Lett., 2, 2, N5- N7 (2013) and ECS J. Sol. St. Sci. Tech., 2 (6) N131- N139 (2013). 3. M. R. Baklanov, L. Zhang, R. Dussart, J.-F. de Marneffe. IEEE International Interconnect Technology Confer- ence (IITC), Kyoto, June 2013. Invited talk 4. M. R. Baklanov, L. Zhang, J.-F.de Marneffe, R. Dussart, A. Goodyear. Materials for Advanced metallisation (MAM’20) MIKHAIL BAKLANOV is a principal scientist at imec, JEAN-FRANCOIS DE MARNEFFE is a senior scientist, imec, LIPING ZHANG is a PhD researcher at imec and KU Leuven, IVAN CIOFI is a senior scientist, imec, and ZSOLT TOKEI is program director nano interconnects, imec.