By Paul Trio, SEMI
Growing Demands, Constraints Continue
For many years, the ATE industry has been challenged with controlling the cost of both production and development test by implementing innovative approaches and employing clever strategies (e.g., multi-site test implementation, DFT, etc.) to make “ends” meet, so to speak. This predicament has been a perpetual struggle, but the industry manages to soldier on. However, the demands for next-generation technology continues to introduce new challenges to the ATE realm. For example, shorter production ramp-up and higher yields result in the increasing demand for test data and information in real-time. Not only is there a need for more data quickly, but also for better test data quality. Adding to the complexity is that existing formats are typically slow/limited or even proprietary. As a result, the equipment manufacturers are burdened with supporting multiple proprietary data transport and communications systems. This requires the use of valuable engineering resources to develop and maintain these multiple proprietary systems, whereas a single standard system would open up resources to develop new ATE features and products.
ATE Industry Alliance
These ATE industry problems are being addressed by CAST – Collaborative Alliance for Semiconductor Test – a SEMI Special Interest Group (SIG). SEMI SIGs provide a forum that fosters discussion and aligns stakeholders on industry-critical issues. CAST was formed in 2008 by semiconductor device makers and test industry suppliers to engage in and resolve common industry issues related to higher test equipment utilization, lower costs, and greater return on investment. In 2009, CAST became a SEMI Special Interest Group. Its charter includes fostering pre-competitive collaboration as well as developing and promoting standards that enable industry productivity improvements.
CAST members include a range of semiconductor industry leaders, ranging from automated test equipment (ATE) companies to integrated device manufacturers (IDMs) to fabless manufacturers to outsourced semiconductor assembly and test (OSAT) companies. Companies participating in CAST include: Advantest, ASE, Galaxy Semiconductor, GLOBALFOUNDRIES, Infineon, Maxim, Nvidia, Optimal+, PDF Solutions, Qualcomm, Roos Instruments, STMicroelectronics, Teradyne, Tesec, Texas Instruments, Xcerra.
The CAST organization is primarily comprised of a steering committee and two working groups. The CAST Steering Committee meets quarterly to review progress on programs and identify new solutions needed by the industry. The Steering Committee is comprised of decision-makers and strategic thinkers of the participating companies mentioned above.
The current CAST working groups that are addressing data transport and control are the Rich Interactive Test Database (RITdb) WG and the Tester Event Messaging for Semiconductor (TEMS) WG.
Enabling Adaptive Test through Next Generation Standard Test Data Format
While Standard Test Data Format (STDF) is widely used in the semiconductor industry today, its current specification does not directly support the new use models in today’s test environment, such as real time or pseudo real time queries, adaptive test and streaming access. The STDF V4 record format is not extendible and the specification itself can be imprecise, such that it tends to result in many interpretations. These limitations become apparent when there is a need for more efficient and flexible format to manage “big test data.”
The RITdb group has been working on the next generation format following STDF with more flexibility in data types as well as allowing support for adaptive test. The WG aims to provide a standards-driven data environment for semiconductor test including simple standards-based data capture, transport and relationship model for eTest, probe, and final test data. Their work also aims to support equipment configuration management and operational performance data. RITdb is a SQLite database with one table, independent from an operating system. Key value store optimized for test data.
To date, the group has defined the mapping from STDF v4 to RITdb. A translator developed by the RITdb is also available. The overall schema has already been defined and many file translations have already been tested. Work by the RITdb group will ultimately be developed into SEMI Standards. Therefore, the group has been working on the (SEMI Standard) spec which will be in MS Word, while the database itself will be in a different format. There will be a spec editor that will help ensure the spec is used correctly. The group also plans to expand the spec beyond probe and final test. Meanwhile, the group is working on experiments related to streaming RITdb as well as work on using different extensions (e.g., tester log, streaming). Additional work will be needed on probe maps as well as on doing test cases (i.e., be able to run verifiers to validate the spec).
Improving Test Yield through Common ATE Data Communication Interface
Semiconductor test operations involved in ATE today continues to see a surging demand for data for real-time data analysis and real-time ATE input and control of the test flow to improve test yield, throughput, efficiency, and product quality. At the same time, test equipment and test operations around the world utilize a diverse range of data formats, specifications, and interface requirements that create significant customer service and application engineering costs for ATE vendors, OSAT companies, IDM test operations, software providers, and handler equipment. A common ATE hardware and software communications interface would help reduce the cost, time and complexity of integrating ATE equipment into data-intensive test operations.
The TEMS WG was chartered to develop a standardized ATE data messaging system based on industry standard internet communication protocols between a Test Cell host and a server. The standard will be limited to ATE data messaging, using RITdb entity types, where applicable, as well as the standard data format, and control requirements. It will have no impact on other test communication interfaces such as those involving handlers, probers, test instrumentation, and other systems covered by existing standards (e.g., SEMI E30, E4, E5, STDF, etc.).
The group will essentially develop a set of standards to define a vendor neutral way to collect test cell data. The primary spec defines the Model while a subordinate spec defines the Transport layer to maintain consistency with prior standards.
Similar to the RITdb activity, the TEMS group plans to transition its two working documents to the SEMI Standards space. As the group continues to fine-tune these documents while maintaining alignment with the RITdb WG, the preliminary SEMI Standards work (e.g., authorize formation of corresponding task force) is expected to occur by the end of the year.
Other ATE Challenges Looming
System Level Test (SLT) is an approach used to guarantee the performance of a product for a particular customer application. However, the term “System Level Test” (SLT) is frequently applied to both the testing of full systems as well as to the testing of chips to ensure their ultimate performance in target systems. This often leads to confusion.
For its 2016 workshop to be held in early November, CAST will address the topic of “Component SLT”, which is the set of application-specific functional tests that are performed prior to I.C. shipment to guarantee a chip’s quality and performance when it will be ultimately used in the final system. It may also encompass incoming inspection of I.C. components by customers prior to assembly into systems. Currently, component SLT tends to be implemented primarily on complex SoC devices using custom hardware and software.
Component SLT considerations:
- Normally component SLT would be applied using a card or board based on the target system’s functional card or board — but with a socket where the IC component is temporarily placed while SLT tests are applied.
- Component SLT is used by some chip vendors as an IC component test after conventional Final Test on ATE.
- Potentially, component SLT could also be applied using a custom card within the ATE system that mimics system application tests.
- Any level of standardization will ease the capital burden and operational flexibility at OSATs.
- It will be a key requirement to be able to generate data from component SLT that can be shared backwards and forwards along the semiconductor supply chain for yield optimization and quality/reliability management.
Those looking to share their perspectives on component SLT and their vision for its future direction are invited to present at the CAST workshop. The community is particularly interested in opportunities to improve the Component SLT infrastructure or methods — that is, identify potential opportunities for CAST to drive improvements through pre-competitive collaboration.
Participating in SEMI CAST Special Interest Group