CEA-Leti, in a multi-partner project with SET, STMicroelectronics, ALES and CNRS-CEMES, will demonstrate high-alignment-accuracy chip-to-wafer structures made by direct metallic bonding. Such structures are required for high-performance 3D ICs, and possibly microelectronics, optoelectronics, or MEMS.
EV Group (EVG) debuted the EVG620HBL fully automated mask alignment system for the manufacture of HB-LEDs, compound semiconductors and power electronics. The EVG620HBL adds a high-intensity UV light source and five cassette stations to EVG's mask aligner platform.
Tessera Technologies Inc. (NASDAQ:TSRA) announced that on February 17, 2011, it sent Amkor Technology, Inc. an official notice of termination of their license agreement with Tessera. The two companies are currently in arbitration regarding multiple issues.
Jamal Izadian, co-founder & president of RFCONNEXT, makes the case for shaped membrane transmission lines (SMTL) for use in high-speed 3D packaging applications. SMTL supports and improves flip-chip, micro-bumping, wafer thinning, system-in-package (SiP), package-on-package (PoP), and other packaging processes by extending the bandwidth and high-speed limits of these technologies.
inTEST Corporation (NASDAQ: INTT) subsidiaries, Temptronic and Sigma Systems, both in Sharon, MA, will begin operating under the umbrella trade name, inTEST Thermal Solutions Corp.
Agilent Technologies Inc. (NYSE:A) expanded its mixed-signal and digital-storage oscilloscope portfolio with 26 new models that comprise its next-generation InfiniiVision 2000 and 3000 X-Series. Entry-level mixed-signal oscilloscopes and an integrated function generator are part of the 2 new product groups.
STATS ChipPAC launched fcCuBE technology, an advanced flip chip packaging technology that features copper (Cu) column bumps, bond-on-lead (BOL) interconnection and enhanced assembly processes. STATS ChipPAC claims the flip chip package is cost-comprable to standard packaging processes, and compatible with shrinking semiconductor device nodes down to 28nm.
Camtek Ltd. (Nasdaq:CAMT; TASE:CAMT) received an order for multiple wafer inspection systems from one of the world's largest manufacturers of CMOS image sensors (CIS).
InVisage Technologies, image sensor technology start-up, received its series C round of venture funding, led by Intel Capital. The undisclosed amount will be used to bring the company's quantum-dot-based QuantumFilm technology and products into mass production.
Dave Rose, Keithley Instruments, addresses specific cabling techniques for DC, multi-frequency capacitance, and ultra-fast I-V and pulse testing, as well as the importance of proper grounding and shielding, choosing the proper interconnect for a specific measurement, and troubleshooting common interconnect problems.
Hitachi Chemical has granted Henkel a worldwide license for the manufacture and sales of certain dicing die attach film.
Altera closed the gap on Xilinx considerably in 2010, but Xilinx's competitive 28nm product should enable it to stay at the top of the FPGA market. Start-up Achronix could be the first to reach 22nm because of its Intel connection. The Linley Group's FPGA report, "A Guide to FPGAs," covers competitors within the FPGA space, as well as FPGA adoption in the chip industry.
Palomar Technologies, precision microelectronics and optoelectronic packaging systems provider, will hold meetings at Stategies in Light to discuss its recent upgrades to high-brightness LED (HB-LED) assembly.
Amkor Technology Inc. (NASDAQ: AMKR), semiconductor assembly and test services provider, announced financial results for 2010, with net sales of $2.94 billion, net income of $232 million, and earnings per diluted share of $0.91. Amkor is currently planning capital additions of approximately $500 million for 2011.
SPP Process Technology Systems (SPTS) received a follow-on purchase order from CEA-Leti for its Sigma fxP PVD system. The 300mm system will be used for advanced TSV development at Leti's new 300mm fab extension in Grenoble.
FleX Silicon-on-Polymer replaces the mechanical substrate of a traditional silicon wafer with a pliable polymer. Compatible with CMOS wafers from varioius foundries, FleX is a wafer-scale process that can be used to produce single die up to full 200mm flexible wafers.
ElectroIQ caught up with Suresh Ramalingam, director of advanced package design and development at Xilinx, at the January MEPTEC luncheon, where he gave a presentation on the company's stacked silicon interconnect technology. In an interview with Debra Vogler, Ramalingam discusses SSIT in relation to die stacking and TSV.
Under a 3-year, $9.3 million contract with the Air Force Research Lab (AFRL), Camgian Microsystems will develop two ASICs with ultra-low-power characteristics: an RF transceiver ASIC will use radar-on-a-chip technology, while a DSP architecture will integrate aggressive power management.
During the past ten years, Clarkson University has received more than $1.4 million of direct and indirect (through Semiconductor Research Corporation) funding from Intel Corporation.
All the major semiconductor players are embracing 3D integration, says Simon Deleonibus. The CEA-Leti scientist and IEEE Fellow wants to see TSV mature and new technologies develop based on wafer bonding. He speaks with Debra Vogler.
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