Flip Chip Attach Alternatives - Advanced Packaging
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Flip Chip Attach Alternatives

Advances in Bump Technology


It is estimated that more than 90% of the first level microelectronic interconnects are made using wire bonding technologies, with the balance primarily tape automated bonding (TAB) and flip chip interconnect. The predominance of wire bonding is expected to remain for the foreseeable future. In general, it will be low I/O applications (memory devices) that will continue to be wire bonded, while higher I/O applications (logic devices) will require bump connections.1

Gold wire bonding has been a flexible and reliable interconnect solution since its development nearly 50 years ago. But the demand for lower-cost, smaller outline packaging, faster device performance, longer battery life, increased thermal dissipation, ‘clean’ processes, and higher device reliability has driven designers to look at flip chip ball bump connections as an alternative to conventional wire bonding.

The demand for more compact packaging of electronics is manifest in the evolution of the cellular phone, with its size seemingly inversely proportional to an increase in performance and features. By using a flip chip interconnect process, the chips can be electrically connected in a more compact fashion. Figure 1 shows a comparison between a wire connection and a flip chip bump connection. The entire die and interconnect is essentially reduced to the die size plus the bump height. A switch to bump connections can contribute to a 30% or greater reduction in the final package size.

Figure 1. Wire connection vs. flip chip bump connection.
Click here to enlarge image

One of the obvious benefits of the bump interconnect solution is the reduced interconnect length. A typical wire length might be 30 mils long. A typical bump connection, by comparison, might be only 2 mils long. Eliminating bond wires reduces the delaying inductance and capacitance of the connection by a factor of 10, and shortens the path by a factor of 25 to 100. The result is high-speed, off-chip interconnection.2 When compared to a wire connection, the lower inductance of a bump connection will translate into reduced losses and lower power requirements.

Another driver in the need for bump connections is the demand for higher-frequency applications. At some point, the limitation of the wire interconnect will force a redesign to incorporate a bump or flip chip connection. In general, that threshold is believed to exist for applications that will operate at speeds between 20 and 50 Gbs/sec.3

Clean, contamination-free assembly processes are required for optical devices such as image sensors, photodetectors, and solid-state lasers. Flux from a conventional solder flip chip attach process occludes the optical surfaces of these devices and significantly degrades their performance and reliability. In these cases, bump Au flip chip attach can provide a clean, contamination-free interface.

Solder Bump Solution

Flip chip or bump connections are largely made today with a lead-based solder, lead-tin being the most common. It is estimated that solder reflow is used as a solution in 80 to 90% of the total flip chip market.4 The remaining 10 to 20% of bump connections are achieved using a variety of other methods. In addition to the gold bump solution, other alternatives include a conductive epoxy bump, copper bumps, column-shaped bumps, and even spring-type connections.

Note that solder bumping takes place at the wafer level, and not the single-die level. Stated another way, solder bumps’ deposition is designed around a wafer scale and are not suited for situations where bumping an individual die is needed. Die level bumping is particularly attractive to R&D, process development, and small-volume manufacturing processes.

Furthermore, lead-free initiatives are forcing manufacturers to turn away from processes that depend on lead-based solders. While lead-free solders are available today, the solder solution has already earned a tarnished reputation. Manufacturers are seeking solder-free packaging solutions.


Gold’s conductivity offers perhaps its strongest advantage over solder. In a comparison of the properties of the two materials, we see that lead (and its alloys) has an electrical resistivity of 22 µΩ-cm, while gold is 2.19.5 Gold offers an order of magnitude better electrical conductivity than conventional solder with an attendant increase in thermal conductivity.

How Gold Bumps are Made

Ball bumps can be made with a commercially available wire bonder. In fact, gold ball bumping is an extension of the 50-year-old wire bonding process. The ball bumping process is a variation of this wire bonding operation where the wire is sheared off after the ball is initially connected to the die or substrate.

Figure 2. Gold ball bumps attached to a die.
Click here to enlarge image

The resulting gold bump (also known as a stud bump) is firmly attached to the bond pad. Five such bumps, attached to a die, are shown in Figure 2.

Flip Chip Mounting of Gold-bumped Die

There are four leading alternatives for flip chip mounting of gold-bumped die: nonconductive epoxy; conductive epoxy; thermocompression attach; and thermosonic compression.

Nonconductive Epoxy Process. This approach calls for an adhesive material to fill the void between the die and the package and around the gold bumps. This adhesive or epoxy will shrink as it cures, and provide the forces needed to hold the die and package together. The connection is made with a physical metal-to-metal contact between the gold ball and opposing bond pad on the package. In this case, the ball is typically a coined shape to maximize the surface area in contact.

It is common in this process to use an anisotropic conductive adhesive (ACA). This refers to a particular type of adhesive that becomes conductive only in the Z-direction or, more precisely, in the direction that it is being compressed. The compressed adhesive is that which is trapped between the bump and package. When this is compressed, conductive particles inside the epoxy will align themselves and create a conductive path between the die and package. Note that there is no conductive path in the X and Y directions, which would create a shorting path between the bumps.

Figure 3. Conductive epoxy solution.
Click here to enlarge image

Conductive Epoxy. The conductive epoxy solution calls for the application of a small dot of conductive epoxy to the top of each gold stud (Figure 3). As a variation of this solution, the epoxy can be placed on the opposing pad in the package. Figure 4 also shows a cross section of a gold bump that has been flipped and connected using the conductive epoxy solution. Surrounding both the ball and the conductive epoxy is an underfill material.

Figure 4. Optimized shape for conductive epoxy solution.
Click here to enlarge image

The challenge to this process is in the application of epoxy in sufficiently small quantities. Gold bump sizes today range from 2 to 4 mils in diameter. Placing an equal sized dot of epoxy can be challenging due to viscosity and dispensing equipment limitations. Solutions available today include positive-displacement dispensers, screening, pin transfer, daubing, and gang daubing.

Thermocompression Attach. Using this technique, there are no adhesives to join the die and the package. Instead, heat and force are applied to the die in a process called ‘thermocompression bonding.’ The bumps are forced against their opposing pads and a second metallic bond is formed where the bond comes into contact with the package metallization. This technique typically requires the use of heat as high as 350° to 400°C, and forces of as much as 100 g/bump.

The negative side to this process is that the die is subjected to high force and temperature. Dies that are thinner, brittle, or intolerant of high heat may not be suitable for attaching using this method.

Thermosonic Attach. This process is nearly identical to the thermocompression solution, with the exception that an ultrasonic transducer is used to induce another form of energy to the bonding process. In this way, the heat and force requirement may be reduced substantially.

The challenge to this process is determining how the application of ultrasonics will affect the die structurally. One determining factor will be the mechanism used to hold the die while the forces are being applied. Collet selection is critical in minimizing the stresses.


The term coplanarity, as it refers to flip chip bonding, refers to the height consistency that exists across the top of all bumps. Ball height variations can lead to uneven distribution of forces, die fractures, and open circuits. Typical requirements for coplanarity call for less than 5 µm of variation in bump height across the entire die.

Bump Shapes & How They Affect the Process

The optimization of any gold flip chip process is achieved by optimizing the bump shape. New bump formation techniques have been developed that can create a gold bump without the traditional tail. This bump was designed specifically for a thermocompression or thermosonic bonding process. This shape directs the compression forces to assist in the formation of an intermetallic bond. By focusing the applied energy down to a smaller surface area, the other bond parameters (heat, force, and ultrasonics) can be reduced. As this bump continues to be compressed and deformed, the surface area in contact will grow to increase the conductive area.

For the conductive epoxy solution, a shape like the one in Figure 4 may be preferred. This bump has a center stud and a matted finish around the top half. The finish was created by the impression of the capillary onto the gold ball. This matted texture is favorable to the epoxy solution because it provides an optimized surface for conductive epoxy to adhere and remain in place during the flip and attach process.

Figure 5. Optimized flat top bump for underfill process.
Click here to enlarge image

A flat top bump is a desirable shape for an underfill process. The SEM photo in Figure 5 shows a flat top bump that was created using a shearing process across the top of the bump immediately after it was formed. Using this process eliminates the need for a separate coining process.

Other Considerations

Underfill materials are usually necessary in the solder process, but not always necessary in the gold processes. Underfill materials add to the structural integrity of the completed die/bump package. An underfill material can help minimize the stresses occurring due to differential thermal coefficient of expansion (TCE) between the die and the package. An underfill also adds to the structural support of the completed package and buffers some of the damaging stress that is associated with thermal cycling.


Many manufacturers and packaging designers are looking for alternatives to the traditional solder flip chip process. Gold bump solutions provide several advantages. There are a number of different gold bump processes that are available to meet the different process needs. Finally, the gold bump shape should be optimized to ensure the most efficient manufacturability and long-term reliability. Recent advances in bump technology allow the formation of flat-topped bumps without the added step of a coining process, providing a ready-made solution for packaging and process engineers.


  1. Puttlitz, Karl J., “Area Array Technology: The Basics and Packaging/Assembly Innovations,” Die and Packaging-Level Microelectronics Assembly: Base and Advanced Technology Course, San Diego, CA, Nov. 2001.
  2. Riley, George, “Bump, Dip, Flip: Single Chip,” Proceedings 1997 Surface Mount International, September 1987, pp. 535-541.
  3. Lee, T. et al, “Gold Stud Bump Bonding for High Frequency Packaging: Impact of Gang Coining and other Process Variables on Electrical Properties,” IMAPS Garden State Spring Packaging Symposium, May 2002.
  4. Greig, W. J., Bendat, S., and Saba, V.R., “Flip Chip Technology - Achieving Precise Placement and Attachment,” May 2002, p. 4.
  5. “Comparison of Materials - Section A”, Materials Engineering, Materials Selector, (Dec 1986), p. 28.

BRUCE HUENERS, vice president of Marketing, may be contacted at Palomar Technologies, 2230 Oak Ridge Way, Vista, CA (760) 931-3600; e-mail: [email protected]


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