Date: December 16, 2015 at 12:00 p.m. ET
Free to attend
Length: Approximately one hour
NAND Flash has become the non-volatile memory of choice for smart phones, tablets and solid state drives. The success of NAND in these markets has been driven by a relentless improvement in cost per bit by continually shrinking lithographic features for 2D planar NAND. This lithography driven model for 2D NAND is now breaking down and 3D has entered the market as the NAND solution of the future. In the first segment of the Webinar we will discuss how NAND flash has gotten to where it is today and the current technical limitations. This will set the stage for the second segment addressing 3D NAND.
Flash memory has revolutionized the world of solid-state data storage, mainly because of the advent of NAND technology. Started in multimedia applications for the consumer market (cell phones, audio players, digicam, USB sticks…) the technology has recently migrated also in the laptop and tablets market as well as in enterprise storage and server farms where it has become an indispensable component in the memory hierarchy of large storage systems. Especially the latter is a major growth market, which will propel Flash into the Terabit era.
However, from the technical point of view, this requires a major change in how these memories are being fabricated. The floating gate concept which has been the old ‘work horse’ for the entire nonvolatile memory market since the 60s until today, has finally run out of steam because of major physical limitations with respect to the device electrostatics. Therefore, the industry has been looking for alternatives for many years (Phase Change memory, Spin-based Magnetic memory, Ferroelectric memory, Resistance RAM, micromechanical memory, nanocrystal memory, TANOS, etc). Finally, the winner concept turns out to be the 3D or vertical NAND concept which is based on the stacking of vertical gate-all-around (GAA) devices with a nitride charge trapping layer. While the other ‘emerging’ memory types mentioned above are narrowed down to other application areas such as embedded memories and storage class memories (SCM), the 3D NAND has created a new roadmap which is no longer solely linked to the lithography roadmap but rather to a combination of parameters such as cell diameter, vertical cell pitch, numbers of cells in a stack and the number of bits per cell.
This presentation will discuss this (r)evolution as well as its major scaling limitations.
Jan Van Houdt received a MSc degree in Electrical and Mechanical Engineering and a PhD from the University of Leuven. During his PhD work, he invented the HIMOS™ Flash memory, which he transferred to several industrial production lines. In 1999 he became responsible for Flash memory at imec and as such was the driving force behind the expansion of imec’s Memory Program. Today he is Chief Scientist in the Process Technology unit of imec. He has published more than 250 papers in international journals and accumulated more than 200 conference contributions (incl. 35 invitations and 5 best paper awards). He has filed more than 50 patents and served on the program and organizing committees of 10 major semiconductor conferences. In 2014 he received the title of IEEE Fellow for his contributions to Flash memory devices. Recently, he was appointed a part-time professor in Electrical Engineering and Nanotechnology at the University of Leuven.
Scotten (Scott) W. Jones has nearly 30 years of experience in the semiconductor and MEMS industries, 18 of those in senior management positions. He holds a BS in Physics from the University of Rhode Island, has published dozens of papers, books and book length reports and holds two patents. His career focus has been on manufacturing and process technology. Scott’s responsibilities have included manufacturing, engineering, IT, technology development, finance and accounting. Scott has built or upgraded several wafers fabs and has extensive experience in manufacturing execution systems, cost modeling, IP licensing agreements, outsourcing and foundry relationships. Scott’s management positions have included Vice President and Co-General Manager of a Semiconductor Division, Vice President of Operations at a Semiconductor Company and Vice Presidents of Engineering and Vice President of Operations at a MEMS Company. Scott is a senior member of the IEEE and is a lifetime member of Strathmore’s Who’s Who. In addition to serving as President of IC Knowledge, he also serves as a Director of the Georgetown Education Foundation.
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