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Wlp

Wlp news and technical articles from Solid State Technology Magazine. Search Wlp latest and archived news and articles

  1. Flip chip bumping, WLP partnership unites FCI and NANIUM

    Article

    Tue, 6 Mar 2012

    Flip chip bumping and wafer-level packaging ( WLP ) supplier FlipChip International (FCI) signed ..... services provider, for 300mm flip chip bumping and WLP . The partnership revolves around NANIUM's 300mm WLP services and FCI turnkey bump services for 150mm

  2. LED, WLP , SiGe metrology challenges of today

    Article

    Thu, 4 Aug 2011

    August 4, 2011 -- Light emitting diodes (LEDs) , silicon germanium (SiGe) semiconductors , and wafer-level packaging ( WLP ) bumps each present their own challenges to metrology systems, says Alon Kapel, Jordan Valley Semiconductor. He speaks with

  1. Wafer packaging database provides WLP data

    Article

    Fri, 23 Sep 2011

    Data includes wafer-level packaging ( WLP ) activity and installed capacities. Flip ..... packaging (WLCSP) make up the mainstream of WLP . On the leading edge are through silicon via (TSV) for 3D WLP , 2.5D interposers, fan-out WLP (FOWLP

  2. STATS ChipPAC expands WLP capacity with new Singapore facility

    Article

    Thu, 5 Jan 2012

    Yishun, Singapore and will enable STATS ChipPAC to expand its manufacturing capabilities for advanced wafer level packaging ( WLP ) technologies including embedded Wafer Level Ball Grid Array (eWLB), Wafer Level Chip Scale Packaging (WLCSP), Integrated

  3. WLP start-up combines SunPower solar silicon fab with Cypress semiconductor interconnect

    Article

    Wed, 9 Nov 2011

    derivatives. The company's aim is to eliminate supply chain, cycle time, and integration problems with wafer-level packaging ( WLP ). Advanced interconnects will be formed using SunPower's silicon solar cell wafer processing methods, which were themselves

  4. Embedded WLP , TSV interposers, copper pillar, materials: 4 projects of IME packaging consortium

    Article

    Wed, 15 Jun 2011

    devices" in mind on 4 projects over 18 months. The consortium will tackle: Multiple Chip Embedded Wafer Level Packaging ( WLP ) : Confronting re-construction process challenges and developing validated numerical models; Through Silicon Via (TSV

  5. Applied Materials creates WLP center with Singapore Institute of Microelectronics

    Article

    Wed, 13 Apr 2011

    The Center will have a full line of wafer level packaging ( WLP ) processing equipment for die stacking and through silicon vias ..... and device structures. Applied has provided equipment for WLP since 2009 with a comprehensive line of processing systems for

  6. Korean IDM orders NEXX tools for WLP metallization

    Article

    Tue, 28 Jun 2011

    300mm Stratus electrochemical deposition (ECD) systems. The IDM will use its Stratus ECD tools for wafer-level packaging ( WLP ) metallization processes for cutting-edge mobile products. The manufacturer needed packaging tools that could handle high

  7. STATS ChipPAC widens fan-out WLP configurations with TSVs, IPDs

    Article

    Tue, 31 May 2011

    STATS ChipPAC says integrating through-silicon vias with passive devices and its eWLB technology addresses complex design issues, shrinking lithography nodes, and increased performance demands for mobile and consumer applications.

  8. Compugraphics expanding photomask sizes for WLP

    Article

    Fri, 19 Aug 2011

    Compugraphics International is widening its line of photomasks to include larger-area products up to 16 in 2 , responding to customer demand for wafer-level packaging and other semiconductor and optical applications.

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