Wafer Process
Wafer Process news and technical articles from Solid State Technology Magazine. Search Wafer Process latest and archived news and articles
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Fraunhofer delivers 300mm wafer processing to North America with Axus Technology
… technology centers of Dresden, Germany, will use CMP supplier Axus Technology exclusively to provide advanced 300mm wafer process development and foundry services to North American customers. Axus Technology is partnering with the Fraunhofer centers …
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Reducing mask write-time—which strategy is best?
… engine more opportunity to reduce the shot count. Experiments demonstrate up to 28% reduction with a limited impact on wafer process window and max EPE. However, it does require an update to the workflow on the current mask writer equipment. Optimized …
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SPTS sends dry MEMS etch tool to China research institute
… common MEMS materials, such as aluminum, preventing attack on exposed surfaces. The Primaxx Monarch 3 uses a 3- wafer process module for higher throughput and repeatable etch processes. SPTS’ HF vapor etch technology reportedly prevents stiction …
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High-volume semiconductor fab reduces particle contamination test time
… least one hour; daily throughput averaged 8 cassettes or lot boxes; that required 16 technician hours. The monitor wafer process did not provide remote real-time feedback, so one operator was needed for tool operation and another for set up …
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Yield challenges and the 450mm learning curve
… turning point as the world's leading international chipmakers announced a collaboration to develop and deploy 450mm wafer process tools and capabilities. Several equipment companies have already begun to build 450mm-capable tools and have encouraged …
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The effect of pumping methods on wet etching processes
… the etching of PE-TEOS wafers was investigated. The experiments were conducted in conventional wet bath and single wafer process tools, measuring etch rate, etch rate uniformity, and wafer-to-wafer uniformity, for various pumping methods …
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20nm mask technology relies on SMO and DPT
… starting 20nm logic device production, 2012 will be a period of fine-tuning and process improvement. To enable wafer process integration, production-quality photomasks must be available 18 months to 2 years ahead of volume wafer production …
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IEEE Frederik Philips Award goes to C.Y. Lu
… the project provided Taiwan with its own dynamic random access memory (DRAM) mass-production capabilities and 8" wafer process technology. Also read: New installed wafer capacity leader: Taiwan took over in 2011 Lu co-founded Vanguard International …
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Model-based mask data prep using overlapping shots for 20nm devices
… A 2009 Samsung study [2] demonstrated that at 20nm and beyond, a trade-off between e-beam shot-count and wafer process window (PW) exists whereby the number of shots needed to assure excellent PW using aggressive OPC can result in untenable …
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Cymer talks EUV, TCZ, light source monitoring upgrade
… source product as well: the OnPulse Plus data monitoring system that enables correlation of light source performance to wafer process performance. With respect to the current EUV source technology (HVM I source) performance, Farrar said that the …
