Wafer Level Packaging
Wafer Level Packaging news and technical articles from Solid State Technology Magazine. Search Wafer Level Packaging latest and archived news and articles
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Flip chip probe card from Wentworth Laboratories withstands high-power, high-density test
The AccumaxDirect premier vertical probe card from Wentworth Laboratories withstands "severe test parameters" in high-volume flip chip/C4 test.
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Tektronix buys Teradyne testers for better test dev, IC test range
Tektronix Component Solutions purchased 5 Teradyne J750EX semiconductor test systems to screen a wider variety of complex ASICs, increase test capacity, and generate test programs faster.
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JEDEC revises package inspection standard JESD9B
The JEDEC Solid State Technology Association published a significant revision to JESD9B, Inspection Criteria for Microelectronic Packages and Covers.
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Technic Pd/Ni process eliminates free ammonia in leadframe fab
Technic Inc. debuted Pallaspeed Pd/Ni NFA, a production-proven sulfate palladium nickel process that produces low-stress ductile deposits over a wide current density range, for structures like semiconductor package leadframes.
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Semiconductor industry executives: Can't miss events at SEMICON West
To maintain profitability and growth in the next 10 years, semiconductor executives must understand and successfully execute lab-to-fab transitions of new technologies. 2 SEMICON West sessions aim to tackle these issues.
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Korean IDM orders NEXX tools for WLP metallization
NEXX Systems installed 2 300mm Stratus deposition at a Korean IDM for high-volume wafer-level packaging processes.
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Crystal oscillator adhesives debut from Creative Materials
Creative Materials now manufactures electrically conductive and electrically insulating adhesives for quartz oscillator circuits, used for bonding leads and lids. The low-stress adhesives feature good thermal stability with low out-gassing.
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TSV moves to "real engineering," but reliability data needed
Jan Vardaman, president and founder of TechSearch International, summarizes highlights from her SEMICON West presentation on TSVs, speaking to RDL development, LED packaging, and TSV-alternative PoP.
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One year later: Amkor/TI high-density copper pillar bump technology
In late June 2010, Amkor and TI announced that they had qualified and begun production of the industry's first fine pitch copper pillar flip chip packages—shrinking bump pitch up to 300% compared to then current solder bump flip chip technology.
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World News
BUSINESS TRENDS VLSI tool champs prove customer service matters VLSI Research's out with its annual "Best supplier" rankings, and there's a tie atop the leaderboard. Nine-time champ Varian Semi. Equip. Assoc. and first-timer Novellus both scored 8.18 in the "large supplier" category of chipmaking
