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<description><![CDATA[Silicon On Insulator news and technical articles from Solid State Technology Magazine. Search Silicon On Insulator latest and archived news and articles]]></description>
<link><![CDATA[http://www.electroiq.com/topics/]]></link>
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<title><![CDATA[Peregrine Semiconductor completes license agreement with Murata]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/05/peregrine-semiconductor-completes-license-agreement-with-murata.html]]></link>
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<pubDate><![CDATA[Thu, 30 May 2013 16:46:00 EDT]]></pubDate>
<description><![CDATA[Peregrine Semiconductor Corporation, a fabless provider of high-performance radio frequency integrated circuits (RFICs), today announced the signing of a collaborative agreement with Murata Manufacturing Company.]]></description>
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<title><![CDATA[STMicroelectronics makes analog 130nm H9A CMOS process available through CMP]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/03/stmicroelectronics-makes-analog-130nm-h9a-cmos-process-available.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2013/03/stmicroelectronics-makes-analog-130nm-h9a-cmos-process-available.html</guid>
<pubDate><![CDATA[Thu, 07 Mar 2013 10:06:00 EST]]></pubDate>
<description><![CDATA[Semiconductor technology leaders ST and CMP help universities, research labs and companies prototype next generation of Systems-on-Chip.]]></description>
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<title><![CDATA[Vertical through-wafer insulation: Enabling integration and innovation]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-56/issue-2/features/cover-article/vertical-through-wafer-insulation-enabling.html]]></link>
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<pubDate><![CDATA[Fri, 01 Mar 2013 01:00:00 EST]]></pubDate>
<description><![CDATA[Through-wafer insulation has been used to develop technologies such as Sil-Via TSV and Zero-Crosstalk. PETER HIMES, Silex Microsystems AB, Järfälla SWEDEN]]></description>
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<title><![CDATA[STMicro: 28nm FD-SOI is ready for manufacturing]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-56/issue-1/departments/news/stmicro-28nm-fd-soi-is-ready-for.html]]></link>
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<pubDate><![CDATA[Tue, 01 Jan 2013 01:00:00 EST]]></pubDate>
<description><![CDATA[STMicroelectronics is getting out of the JV chip business with Ericsson, but it's still full-steam ahead for its use of fully-depleted silicon-on-insulator (FD-SOI) technology with its partners.]]></description>
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<title><![CDATA[STMicro: 28nm FD-SOI is ready for manufacturing]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/12/stmicro-28nm-fd-soi-is-ready-for-manufacturing.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/12/stmicro-28nm-fd-soi-is-ready-for-manufacturing.html</guid>
<pubDate><![CDATA[Wed, 12 Dec 2012 14:44:00 EST]]></pubDate>
<description><![CDATA[STMicroelectronics is getting out of the JV chip business with Ericsson, but it's still full-steam ahead for its use of (FD-SOI) technology with its partners. ]]></description>
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<title><![CDATA[ST exiting mobile chip JV with Ericsson, but still committed to FD-SOI]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/12/st-exiting-mobile-chip-jv-with-ericsson-but-still-committed-to-fd-soi.html]]></link>
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<pubDate><![CDATA[Mon, 10 Dec 2012 16:04:00 EST]]></pubDate>
<description><![CDATA[STMicroelectronics has a new strategic plan that will focus on five product areas (MEMS/sensors, smart power, automotive products, microcontrollers, and application processors), and also exit its mobile chip JV with communications giant Ericsson.]]></description>
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<title><![CDATA[Researchers from ST and CEA-Leti receive Général Ferrié Award]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/12/researchers-from-st-and-cea-leti-receive-general-ferrie-award.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/12/researchers-from-st-and-cea-leti-receive-general-ferrie-award.html</guid>
<pubDate><![CDATA[Wed, 05 Dec 2012 10:47:00 EST]]></pubDate>
<description><![CDATA[A team of ST and CEA-Leti researchers have received the 2012 Général Ferrié Award, considered to be the highest award in electronics R&D in France.]]></description>
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<title><![CDATA[IEDM 2012 slideshow 04]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/12/iedm-2012-slideshow-04.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/12/iedm-2012-slideshow-04.html</guid>
<pubDate><![CDATA[Tue, 04 Dec 2012 12:16:00 EST]]></pubDate>
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<title><![CDATA[ICPT 2012: Five themes summarizing CMP work and progress]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/11/icpt-2012-five-themes-summarizing-cmp-work-and-progress.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/11/icpt-2012-five-themes-summarizing-cmp-work-and-progress.html</guid>
<pubDate><![CDATA[Mon, 12 Nov 2012 07:00:00 EST]]></pubDate>
<description><![CDATA[This year's International Conference on Planarization/CMP Technology (ICPT) encompassed five themes describing use of CMP: new device structures, equipment and methods, Cu interconnects, consumables, and new CMP methods and processes.]]></description>
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<title><![CDATA[Soitec, SEH extend Smart Cut licensing deal to "silicon-on-anything"]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/10/soitec-seh-extend-smart-cut-licensing-deal-to-silicon-on-anything.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/10/soitec-seh-extend-smart-cut-licensing-deal-to-silicon-on-anything.html</guid>
<pubDate><![CDATA[Thu, 11 Oct 2012 16:33:00 EDT]]></pubDate>
<description><![CDATA[Soitec and Shin-Etsu Handotai (SEH) have extended their cooperation in Soitec's Smart Cut technology with an extended 10-year licensing agreement, including a new level of joint technology cooperation, to facilitate development and wafer supply of silicon-on-insulator (SOI) wafers.]]></description>
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