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<title><![CDATA[RSS for Deep Reactive Ion Etching]]></title>
<description><![CDATA[Deep Reactive Ion Etching news and technical articles from Solid State Technology Magazine. Search Deep Reactive Ion Etching latest and archived news and articles]]></description>
<link><![CDATA[http://www.electroiq.com/topics/]]></link>
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<title><![CDATA[Vertical through-wafer insulation: Enabling integration and innovation]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-56/issue-2/features/cover-article/vertical-through-wafer-insulation-enabling.html]]></link>
<guid>http://www.electroiq.com/articles/sst/print/volume-56/issue-2/features/cover-article/vertical-through-wafer-insulation-enabling.html</guid>
<pubDate><![CDATA[Fri, 01 Mar 2013 01:00:00 EST]]></pubDate>
<description><![CDATA[Through-wafer insulation has been used to develop technologies such as Sil-Via TSV and Zero-Crosstalk. PETER HIMES, Silex Microsystems AB, Järfälla SWEDEN]]></description>
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<title><![CDATA[DRIE expands from MEMS to advanced packaging and more applications]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2012/05/drie-expands-from-mems-to-advanced-packaging-and-more-applications.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2012/05/drie-expands-from-mems-to-advanced-packaging-and-more-applications.html</guid>
<pubDate><![CDATA[Tue, 15 May 2012 15:52:00 EDT]]></pubDate>
<description><![CDATA[“From 2011 to 2017, the number of DRIE-processed wafers will jump from 5.4M to more than 27M (all wafer sizes). This is >30% CAGR”, explains Dr Eric Mounier, Yole Développement.]]></description>
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<title><![CDATA[MIT designs completely 3D MEMS]]></title>
<link><![CDATA[http://www.electroiq.com/articles/stm/2012/02/mit-designs-completely-3d-mems.html]]></link>
<guid>http://www.electroiq.com/articles/stm/2012/02/mit-designs-completely-3d-mems.html</guid>
<pubDate><![CDATA[Wed, 29 Feb 2012 12:22:00 EST]]></pubDate>
<description><![CDATA[MIT researchers have come up with a new approach to MEMS design that enables engineers to design 3D configurations using existing fabrication processes. They built a MEMS device that enables 3D sensing on a single chip.]]></description>
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<title><![CDATA[Si-Ware platform creates MOEMS on-wafer with lithographic alignment]]></title>
<link><![CDATA[http://www.electroiq.com/articles/stm/2012/01/si-ware-platform-creates-moems-on-wafer-with-lithographic-alignment.html]]></link>
<guid>http://www.electroiq.com/articles/stm/2012/01/si-ware-platform-creates-moems-on-wafer-with-lithographic-alignment.html</guid>
<pubDate><![CDATA[Tue, 24 Jan 2012 14:59:00 EST]]></pubDate>
<description><![CDATA[Si-Ware Systems debuted the SiMOST platform to fab and package single-chip optical systems with validated MEMS components. Multiple MOEMS structures can be patterned and etched on SOI wafers using DRIE. The structures are then wafer-level packaged and diced.]]></description>
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<title><![CDATA[Asian semiconductor packaging specialist orders SPTS etch, PVD and CVD technologies for TSV]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/04/asian-semiconductor.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/04/asian-semiconductor.html</guid>
<pubDate><![CDATA[Tue, 26 Apr 2011 16:10:20 EDT]]></pubDate>
<description><![CDATA[SPP Process Technology Systems (SPTS) won a multi-system order for its Sigma PVD, Omega Etch and Delta CVD wafer processing systems from a leading outsourced semiconductor assembly and test (OSAT) provider in the Asia-Pacific region.]]></description>
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<title><![CDATA[CEA Leti adds SPTS on 3D IC line with 300mm PVD order]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/02/cea-leti-adds-spts-on-3d-ic-line-with-300mm-pvd-order.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/02/cea-leti-adds-spts-on-3d-ic-line-with-300mm-pvd-order.html</guid>
<pubDate><![CDATA[Wed, 09 Feb 2011 13:55:10 EST]]></pubDate>
<description><![CDATA[SPP Process Technology Systems (SPTS) received a follow-on purchase order from CEA-Leti for its Sigma fxP PVD system. The 300mm system will be used for advanced TSV development at Leti's new 300mm fab extension in Grenoble.]]></description>
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<title><![CDATA[Tegal forms solar PV utility development company se2quel Partners]]></title>
<link><![CDATA[http://www.electroiq.com/articles/pvw/2011/01/tegal-forms-solar-pv-utility-development-company-se2quel-partner.html]]></link>
<guid>http://www.electroiq.com/articles/pvw/2011/01/tegal-forms-solar-pv-utility-development-company-se2quel-partner.html</guid>
<pubDate><![CDATA[Thu, 20 Jan 2011 14:50:10 EST]]></pubDate>
<description><![CDATA[Tegal Corporation (Nasdaq:TGAL) and se2quel Partners LLC formed a company dedicated to the development and operation of large-scale photovoltaic (PV)-based solar utilities in the United States, Latin America, the Middle East and Africa.]]></description>
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<title><![CDATA[Tegal-expands-ProNova-ICP-silicon-DRIE-reactor-family]]></title>
<link><![CDATA[http://www.electroiq.com/articles/stm/2010/12/tegal-expands-pronova-icp-silicon-drie-reactor-family.html]]></link>
<guid>http://www.electroiq.com/articles/stm/2010/12/tegal-expands-pronova-icp-silicon-drie-reactor-family.html</guid>
<pubDate><![CDATA[Thu, 02 Dec 2010 14:30:40 EST]]></pubDate>
<description><![CDATA[Tegal Corporation (Nasdaq: TGAL) is launching a new member of its ProNova family of high-density inductively coupled plasma (ICP) reactors for the company’s DRIE series wafer processing products. The ProNova2 is targeted for fast-growing 200mm MEMS and 3D IC applications.]]></description>
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<title><![CDATA[Tegal-expands-ProNova-ICP-silicon-DRIE-reactor-family]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2010/12/tegal-expands-pronova-icp-silicon-drie-reactor-family.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2010/12/tegal-expands-pronova-icp-silicon-drie-reactor-family.html</guid>
<pubDate><![CDATA[Wed, 01 Dec 2010 14:30:40 EST]]></pubDate>
<description><![CDATA[Tegal Corporation (Nasdaq: TGAL) is launching a new member of its ProNova family of high-density inductively coupled plasma (ICP) reactors for the company’s DRIE series wafer processing products. The ProNova2 is targeted for fast-growing 200mm MEMS and 3D IC applications.]]></description>
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<title><![CDATA[Deep silicon etch for TSVs with improved via profile/process control]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-52/issue-4/features/deep-silicon-etch-for-tsvs-with-improved-via-profile-process-control.html]]></link>
<guid>http://www.electroiq.com/articles/sst/print/volume-52/issue-4/features/deep-silicon-etch-for-tsvs-with-improved-via-profile-process-control.html</guid>
<pubDate><![CDATA[Wed, 01 Apr 2009 01:04:00 EDT]]></pubDate>
<description><![CDATA[Through-silicon via (TSV) is an emerging technology for scaling, packaging, and continuing the drive to higher density and higher performance ICs.]]></description>
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