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<description><![CDATA[Transistor news and technical articles from Solid State Technology Magazine. Search Transistor latest and archived news and articles]]></description>
<link><![CDATA[http://www.electroiq.com/topics/]]></link>
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<title><![CDATA[IQE and II-VI Inc. launch 150mm GaN HEMT epi wafers on SiC substrates]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/05/iqe-and-ii-vi-inc--launch-150mm-gan-hemt-epi-wafers-on-sic-subst.html]]></link>
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<pubDate><![CDATA[Mon, 13 May 2013 10:55:00 EDT]]></pubDate>
<description><![CDATA[IQE plc announces the launch of gallium nitride-based, high electron mobility transistor (GaN HEMT) epitaxial wafers on 150mm diameter semi-insulating silicon carbide (SiC) substrates.]]></description>
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<title><![CDATA[New method joins gallium nitride and diamond for better thermal management]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/05/new-method-joins-gallium-nitride-and-diamond-for-better-thermal-.html]]></link>
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<pubDate><![CDATA[Wed, 01 May 2013 11:45:00 EDT]]></pubDate>
<description><![CDATA[DARPA's Near Junction Thermal Transport (NJTT) effort recently demonstrated the first-ever GaN-on-diamond high electron mobility transistor (HEMT).]]></description>
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<title><![CDATA[Manufacturing flexible displays: The challenges of handling plastic]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-56/issue-3/features/cover-artilce/manufacturing-flexible-displays-the-challenges.html]]></link>
<guid>http://www.electroiq.com/articles/sst/print/volume-56/issue-3/features/cover-artilce/manufacturing-flexible-displays-the-challenges.html</guid>
<pubDate><![CDATA[Wed, 01 May 2013 01:00:00 EDT]]></pubDate>
<description><![CDATA[The first flexible high-resolution displays will be produced using materials handling techniques that have been developed to allow the use of existing thin transistor fabrication facilities. NICK COLANERI, Flexible Display Center, Arizona State University, Phoenix, AZ]]></description>
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<title><![CDATA[Analysis of TSV proximity effects in planar MOSFETs and FinFETs]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-56/issue-3/features/packaging/analysis-of-tsv-proximity-effects.html]]></link>
<guid>http://www.electroiq.com/articles/sst/print/volume-56/issue-3/features/packaging/analysis-of-tsv-proximity-effects.html</guid>
<pubDate><![CDATA[Wed, 01 May 2013 01:00:00 EDT]]></pubDate>
<description><![CDATA[The impact of TSV-induced stresses on transistor performance are simulated, and a "keep-out-zone" is identified. Ricardo Borges, Victor Moroz and Xiaopeng Xu, Synopsys, Mountain View, CA.]]></description>
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<title><![CDATA[When the chips are down]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-56/issue-3/features/economics/when-the-chips-are-down.html]]></link>
<guid>http://www.electroiq.com/articles/sst/print/volume-56/issue-3/features/economics/when-the-chips-are-down.html</guid>
<pubDate><![CDATA[Wed, 01 May 2013 01:00:00 EDT]]></pubDate>
<description><![CDATA[There's a need for greater R&D efficiency in the semiconductorindustry. SCOTT JONES, Alix Partners, San Francisco, CA]]></description>
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<title><![CDATA[University of Manchester researchers cultivate first graphene-based transistor]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/04/university-of-manchester-researchers-cultivate-first-graphene-ba.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2013/04/university-of-manchester-researchers-cultivate-first-graphene-ba.html</guid>
<pubDate><![CDATA[Tue, 30 Apr 2013 13:28:00 EDT]]></pubDate>
<description><![CDATA[University of Manchester researchers reported to Nature Communications that they have developed the first graphene-based transistor with bistable characteristics.]]></description>
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<title><![CDATA[Confronting sub-20nm front-end challenges with the “duck and weave”]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/04/confronting-sub-20nm-front-end-challenges-with-the-duck-and-weav.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2013/04/confronting-sub-20nm-front-end-challenges-with-the-duck-and-weav.html</guid>
<pubDate><![CDATA[Wed, 24 Apr 2013 10:40:00 EDT]]></pubDate>
<description><![CDATA[Just as a boxer avoids a surprise shot to the head or torso by using a “duck and weave” maneuver, so to must front-end technologists confront the challenges associated with extending optical lithography while planning for EUV lithography’s eventual high-productivity solution.]]></description>
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<title><![CDATA[Critical updates on EUV, 3D transistors and 450mm manufacturing at SEMICON West 2013]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/04/critical-updates-on-euv--3d-transistors-and-450mm-manufacturing-.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2013/04/critical-updates-on-euv--3d-transistors-and-450mm-manufacturing-.html</guid>
<pubDate><![CDATA[Tue, 23 Apr 2013 13:28:00 EDT]]></pubDate>
<description><![CDATA[The critical processes and technologies necessary to continue Moore’s Law are currently more uncertain than ever before in the history of advanced semiconductor manufacturing.]]></description>
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<title><![CDATA[High-k oxides pose new reliability challenges]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/slideshow/top-7-reliability-challenges/pg003.html]]></link>
<guid>http://www.electroiq.com/articles/sst/slideshow/top-7-reliability-challenges/pg003.html</guid>
<pubDate><![CDATA[Thu, 18 Apr 2013 13:02:00 EDT]]></pubDate>
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<title><![CDATA[IRPS 2013: High-k oxides pose new reliability challenges]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/04/irps-2013--high-k-oxides-pose-new-reliability-challenges.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2013/04/irps-2013--high-k-oxides-pose-new-reliability-challenges.html</guid>
<pubDate><![CDATA[Tue, 16 Apr 2013 12:17:00 EDT]]></pubDate>
<description><![CDATA[New finFETs feature high-k dielectrics, which are better than conventional silicon nitride dielectrics in that they can be thinner, yet still enable good control of the transistor’s channel region from the gate.]]></description>
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