<?xml version="1.0" encoding="UTF-8"?>
<rss version="2.0">
<channel>
<title><![CDATA[RSS for Process Customization]]></title>
<description><![CDATA[Process Customization news and technical articles from Solid State Technology Magazine. Search Process Customization latest and archived news and articles]]></description>
<link><![CDATA[http://www.electroiq.com/topics/]]></link>
<atom:link xmlns:atom="http://www.w3.org/2005/Atom" type="application/rss+xml" rel="self" href="http://www.electroiq.com/topics/urss?pageid=488337"/>
<item>
<title><![CDATA[Tooling and process technology vital for thin packages]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/01/tooling-and_process.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/01/tooling-and_process.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 11:15:30 EST]]></pubDate>
<description><![CDATA[Getting thinner appears to be the goal driving the market in both the wafer-level and substrate-level sectors, and innovative tooling and process technology will become paramount in addressing thinned packaging and ramping up to volume reliably, writes Dave Foggie from DEK.]]></description>
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<title><![CDATA[More collaboration is needed to improve process integration]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/more-collaboration.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/more-collaboration.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 11:05:50 EST]]></pubDate>
<description><![CDATA[Suppliers who demonstrate excellence in core capabilities and have a good understanding of related processes will be able to add significant value in supporting integration needs for next-generation devices, writes David Hemker from Lam Research.]]></description>
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<title><![CDATA[22nm brings maskmakers, end users closer]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/22nm-brings_maskmakers.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/22nm-brings_maskmakers.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 11:05:10 EST]]></pubDate>
<description><![CDATA[The conditions and challenges at the 22nm technology node are becoming clear: double patterning, source-mask optimization are becomign pervasive, EUV is on the doorstep, and they will all have significant impact on mask manufacturers, writes Franklin Kalk from Toppan Photomasks.]]></description>
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<title><![CDATA[22nm: The era of wafer bonding]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/01/22nm_-the_era_of_wafer.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/01/22nm_-the_era_of_wafer.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 11:00:10 EST]]></pubDate>
<description><![CDATA[The migration to the 22nm node is about more than just scaling down, it's also about scaling up with thinner devices stacked into a single package -- and these require new manufacturing considerations with wafer bonding playing a central role, writes Bioh Kim from EV Group.]]></description>
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<title><![CDATA[RoHS, device shrinks will continue to drive packaging technology]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/01/rohs_-device_shrinks.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/01/rohs_-device_shrinks.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 11:00:00 EST]]></pubDate>
<description><![CDATA[Environmental legislation in combination with device miniaturization will continue to drive packaging development efforts throughout 2011 and beyond, writes Doug Dixon from Henkel. And the paradigm of "smaller, thinner, more powerful" is challenging traditional design and assembly rules.]]></description>
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<title><![CDATA[Keys to CMP and cleans in 2011]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/keys-to-cmp-and-cleans-in-2011.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/keys-to-cmp-and-cleans-in-2011.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 10:20:00 EST]]></pubDate>
<description><![CDATA[Robert L. Rhoades, Entrepix, examines the ever-shrinking contamination particle size, and the switch from immersion cleans to single-wafer systems. Custom solutions and new materials at the 22nm wafer fab will mean custom CMP and clean formulations -- if possible, tunable by the user. This is an ...]]></description>
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<title><![CDATA[Failure analysis challenges at 22nm turnkey FA tools]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/failure-analysis-challenges-at-22nm-turnkey-fa-tools.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/failure-analysis-challenges-at-22nm-turnkey-fa-tools.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 10:10:00 EST]]></pubDate>
<description><![CDATA[Paul Kirby, FEI, provides insights on the shift to complex 3D device structures and complex interconnect methods such as TSV. In the future, 3D analysis techniques could play increasingly important roles, he says. In advanced packaging, failure analysis is more critical because multi-die stacks can ...]]></description>
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<title><![CDATA[Enabling lithography for the 22nm node]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/enabling-lithography-for-the-22nm-node.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/enabling-lithography-for-the-22nm-node.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 08:15:00 EST]]></pubDate>
<description><![CDATA[Single-exposure patterning schemes are unable to meet 22nm specifications, which leads fabs to use double-patterning like LELE. However, below 22nm, a simple multiplication of double-patterning is exceedingly difficult. Alternative processes like tone reversal, EUV, and resist freezing are under ...]]></description>
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<title><![CDATA[Materials forecast for 22nm devices]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/materials-forecast-for-22nm-devices.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/materials-forecast-for-22nm-devices.html</guid>
<pubDate><![CDATA[Tue, 11 Jan 2011 07:50:00 EST]]></pubDate>
<description><![CDATA[Weimin Li, ATMI, looks at changes in the materials side of wafer fab that might occur in 2011, especially for advanced DRAM devices. For every evolutionary change or radical new method, cost and performance considerations are high. This is an online exclusive essay in SST's Forecast for 2011: Back ...]]></description>
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<title><![CDATA[Addressing defectivity will require new surface-engineering processes at 22nm]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2011/01/addressing-defectivity.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2011/01/addressing-defectivity.html</guid>
<pubDate><![CDATA[Mon, 10 Jan 2011 11:05:00 EST]]></pubDate>
<description><![CDATA[Gilles Baujon, CEO of Nanoplas, explains how the industry's migration toward the 32nm and 22nm nodes will require development of new process integration schemes, device structures, new materials assemblies -- and thus innovative surface-engineering solutions.]]></description>
</item>
</channel>
</rss>
