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<description><![CDATA[Cob news and technical articles from Solid State Technology Magazine. Search Cob latest and archived news and articles]]></description>
<link><![CDATA[http://www.electroiq.com/topics/]]></link>
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<title><![CDATA[Samsung introduces new, high efficacy chip on board LED packages]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2013/04/samsung-introduces-new--high-efficacy-chip-on-board-led-packages.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2013/04/samsung-introduces-new--high-efficacy-chip-on-board-led-packages.html</guid>
<pubDate><![CDATA[Mon, 22 Apr 2013 17:38:00 EDT]]></pubDate>
<description><![CDATA[Samsung Electronics Co., Ltd. announced today that it is introducing a new 129lm/W high efficiency, chip-on-board (COB) family of LED packages, LC013/26/40B, which features a compact light emitting surface (LES), designed for use in high performance indoor and outdoor lighting, and ideally suited ...]]></description>
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<title><![CDATA[Present on LEDs at Strategies in Light 2013]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/07/present-on-leds-at-strategies-in-light-2013.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/07/present-on-leds-at-strategies-in-light-2013.html</guid>
<pubDate><![CDATA[Mon, 23 Jul 2012 10:36:00 EDT]]></pubDate>
<description><![CDATA[Strategies in Light 2013 will take place February 12-14 in Santa Clara, CA, hosted by PennWell Co.’s Strategies Unlimited and LEDs Magazine. The event’s theme is “Exploring the Growth Opportunities in the LED and Lighting Markets.”]]></description>
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<title><![CDATA[Silicon chip-on-board LED substrate enables best thermal dissipation]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/2012/06/silicon-chip-on-board-led-substrate-enables-best-thermal-dissipation.html]]></link>
<guid>http://www.electroiq.com/articles/sst/2012/06/silicon-chip-on-board-led-substrate-enables-best-thermal-dissipation.html</guid>
<pubDate><![CDATA[Mon, 18 Jun 2012 10:57:00 EDT]]></pubDate>
<description><![CDATA[Daewon Innost achieved what it says is the LED industry’s best thermal dissipation performance on its Glaxum LED Array family, based on the proprietary Nano-Pore Silicon Substrate (NPSS) technology.]]></description>
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<title><![CDATA[LED manufacturers need dedicated toolset and cost savings]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/06/led-manufacturers-need-dedicated-toolset-and-cost-savings.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/06/led-manufacturers-need-dedicated-toolset-and-cost-savings.html</guid>
<pubDate><![CDATA[Mon, 27 Jun 2011 10:46:00 EDT]]></pubDate>
<description><![CDATA[Until now, LED makers used retrofitted IC equipment and materials. Yole predicts that the market has enough sway now to attract dedicated toolsets for LED fab and packaging. LED growth will not be boring, however, as a few mini down-/up-turn cycles will occur through 2016.]]></description>
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<title><![CDATA[IC packaging report covers 12 package types + bare die, SATS providers]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2011/04/ic-packaging-report.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2011/04/ic-packaging-report.html</guid>
<pubDate><![CDATA[Thu, 28 Apr 2011 11:00:20 EDT]]></pubDate>
<description><![CDATA[New Venture Research will release "The Worldwide IC Packaging Market, 2011 Edition" in May 2011. It provides analysis of packaging by I/O count and package type, bare die interconnect, and looks at the major semiconductor assembly and test services (SATS) providers.]]></description>
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<title><![CDATA[DEK-VectorGuard-3D-stencils-for-chip-on-board]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2010/12/dek-vectorguard-3d-stencils-for-chip-on-board.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2010/12/dek-vectorguard-3d-stencils-for-chip-on-board.html</guid>
<pubDate><![CDATA[Fri, 03 Dec 2010 10:40:40 EST]]></pubDate>
<description><![CDATA[VectorGuard 3D stencils are designed for specialist applications requiring multiple level printing. Facilitating printing on different levels with upward or downward steps, VectorGuard 3D enables a uniform stencil thickness.]]></description>
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<title><![CDATA[Vertical-die-stacking-goes-3D-without-TSV]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2010/10/vertical-die-stacking-goes-3d-without-tsv.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2010/10/vertical-die-stacking-goes-3d-without-tsv.html</guid>
<pubDate><![CDATA[Thu, 28 Oct 2010 15:05:30 EDT]]></pubDate>
<description><![CDATA[Andrew Smith, Ventmark Technology Solutions, presents a 3D die stacking technology to address package miniaturization. Using bare die and vertical interconnect structures, this stacking technology permits the design of ultra-thin, near-CSP solutions without TSVs. Designers lacking custom ICs should ...]]></description>
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<title><![CDATA[Advanced packaging technologies: Imbedding components for increased reliability]]></title>
<link><![CDATA[http://www.electroiq.com/articles/ap/2010/04/advanced-packaging.html]]></link>
<guid>http://www.electroiq.com/articles/ap/2010/04/advanced-packaging.html</guid>
<pubDate><![CDATA[Tue, 27 Apr 2010 13:41:00 EDT]]></pubDate>
<description><![CDATA[Imbedded component/die technology is a method of imbedding active and passives into cavities within a multi-layer PCB to decrease the surface area required to implement the circuit design and increase the robustness of the overall assembly. Casey H. Cooper, STI, discusses the design methodology, ...]]></description>
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<title><![CDATA[Engineered to the task: why camera-phone cameras are different]]></title>
<link><![CDATA[http://www.electroiq.com/articles/sst/print/volume-52/issue-6/features/engineered-to-the-task-why-camera-phone-cameras-are-different.html]]></link>
<guid>http://www.electroiq.com/articles/sst/print/volume-52/issue-6/features/engineered-to-the-task-why-camera-phone-cameras-are-different.html</guid>
<pubDate><![CDATA[Mon, 01 Jun 2009 01:06:00 EDT]]></pubDate>
<description><![CDATA[At face value, the camera inside a cell phone is no different from that found in many other digital imaging applications.]]></description>
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<title><![CDATA[Vern Solberg: Design Miniaturization]]></title>
<link><![CDATA[http://www.electroiq.com/topics/m/video/31250818/vern-solberg-design-miniaturization.htm?]]></link>
<guid>http://www.electroiq.com/topics/m/video/31250818/vern-solberg-design-miniaturization.htm?</guid>
<pubDate><![CDATA[Fri, 24 Oct 2008 12:03:39 EDT]]></pubDate>
<description><![CDATA[Vern Solberg, STI – Madison, speaks on miniaturization, such as wafer-level packaging (WLP) and chip on board (COB).]]></description>
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