Test And Inspection
Test And Inspection news and technical articles from Solid State Technology Magazine. Search Test And Inspection latest and archived news and articles
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Verigy tests GDDR5 at Korean memory producer
Verigy (NASDAQ:VRGY), semiconductor test equipment provider, won orders for its V93000 HSM platform to perform volume test on GDDR5 memory devices at a large Korean customer.
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Tektronix buys Teradyne testers for better test dev, IC test range
Tektronix Component Solutions purchased 5 Teradyne J750EX semiconductor test systems to screen a wider variety of complex ASICs, increase test capacity, and generate test programs faster.
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JEDEC revises package inspection standard JESD9B
The JEDEC Solid State Technology Association published a significant revision to JESD9B, Inspection Criteria for Microelectronic Packages and Covers.
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DCG Systems acquires Thermosensorik, accesses new customer sectors
DCG acquired Thermosensorik GmbH, a leading provider of infrared non-destructive testing (IR NDT) products for the semiconductor, photovoltaic, and weld inspection markets.
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Verigy debuts scalable semiconductor testers, digital channel cards
Verigy, an Advantest Group company (NYSE: ATE), launched scalable, cost-efficient testers for advanced semiconductors, such as 3D device architectures and 28nm and below technology nodes: V93000 Smart Scale Generation.
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Olympus inspects bonded wafers with IR microscopy
Greg Baker, Olympus Integrated Technologies America, discusses why the company chose to focus its efforts on IR metrology for defect inspection of bonded wafers. Olympus-ITA launched the latest 3DIR Metrology and Defect Review System at SEMICON West 2011, booth 1524.
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TSV moves to "real engineering," but reliability data needed
Jan Vardaman, president and founder of TechSearch International, summarizes highlights from her SEMICON West presentation on TSVs, speaking to RDL development, LED packaging, and TSV-alternative PoP.
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Extending optical lithography with complementary e-beam lithography
David Lam summarizes how the industry does not have to "throw out" optical lithography as it proceeds to more advanced nodes -- complementary e-beam lithography (CEBL) is part of the overall solution, "complementary lithography," that can overcome the resolution limitations of 193i technology.
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Performance enhancements for multi-die DRAM packages
R. Crisp, et al., Tessera, San Jose, CA USA; W. Chang, et al., Powertech Technology Inc., Hsinchu, Taiwan, R.O.C
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SEMI convenes system-in-package summit alongside SEMICON Taiwan
SEMI will hold the first-ever SiP Global Summit, September 7-9, co-located with SEMICON Taiwan. Three forums cover system in package (SiP) test, the "3D IC era," and the requirements of mobile electronics.
