Silicon On Insulator
Silicon On Insulator news and technical articles from Solid State Technology Magazine. Search Silicon On Insulator latest and archived news and articles
-
ST-Ericsson adopts FDSOI from Soitec
March 12, 2012 -- ST-Ericsson, wireless semiconductor company, selected planar fully depleted silicon on insulator (FD-SOI) technology from Soitec (Euronext), semiconductor materials maker, for use in future mobile platforms …
-
FDSOI improves CMOS scalability, speed, power consumption at 11nm
… silicon thickness (via the use of ultra-thin silicon on insulator [SOI] wafers), Leti has demonstrated the ability of fully depleted silicon on insulator (FDSOI) technology to improve CMOS scalability …
-
Inside Leti: FDSOI, 3D packaging, Si photonics work
… 2011 -- Laurent Malier, CEO of Leti, described the research group's work and the outlook on fully depleted silicon on insulator (FDSOI), 3D packaging technologies, and integrated photonics on silicon ( Si photonics ), in a video interview …
-
EVG tool bonds 450mm SOI semiconductor wafers
… MEMS, nanotechnology and semiconductor manufacturing tool supplier, released a wafer bonding system for 450mm silicon - on - insulator (SOI) wafers: EVG850SOI/450-mm. The automated tool runs at production line speed and comprises a cleaning …
-
EVG wafer clean tool installed at Tokyo Institute of Technology
… Lab. The EVG 301 will remove particles from the surfaces of pre-bonded III-V compound semiconductor and silicon - on - insulator (SOI) wafers as they are fabricated into optical ICs. The EVG301 performs wafer cleaning for various wafer …
-
-
EVG moves Chinese SOI bonder customer to full automation
… EVG850 automated production bonding system for silicon - on - insulator (SOI) and direct wafer bonding. Simgui is moving ..... EVG850LT automated production bonding system for silicon - on - insulator (SOI) wafers in its state-of-the-art SOI …
-
3D integration key to 22nm semiconductor devices
… expect to see mobile, low-power and system-on-chip (SoC) applications implementing planar fully depleted silicon - on - insulator (FD SOI)-based transistors. For many devices, implementation of the 3D system architecture alone is more …
-
Soitec joins SEMATECH metrology work on SOI wafers
… substrate maker Soitec joined SEMATECH's Front End Processes (FEP) and Advanced Metrology Programs, bringing silicon - on - insulator (SOI) wafers and other advanced engineered wafers into the group to work on new processes and technologies …
-
Si-Ware platform creates MOEMS on-wafer with lithographic alignment
… mechanical system (MEMS) components. Multiple optical MEMS (MOEMS) structures can be patterned and etched on silicon on insulator (SOI) wafers using deep reactive ion etching (DRIE) . The structures are then wafer-level packaged and diced …
-
Technical forecast: 22nm devices
… expect to see mobile, low-power and system-on-chip (SoC) applications implementing planar fully depleted silicon - on - insulator (FD SOI)-based transistors. Mask-wafer double simulation: a new requirement Aki Fujimura , CEO, D2S, Inc …
