Package On Package
Package On Package news and technical articles from Solid State Technology Magazine. Search Package On Package latest and archived news and articles
-
TSV moves to "real engineering," but reliability data needed
Jan Vardaman, president and founder of TechSearch International, summarizes highlights from her SEMICON West presentation on TSVs, speaking to RDL development, LED packaging, and TSV-alternative PoP.
-
One year later: Amkor/TI high-density copper pillar bump technology
In late June 2010, Amkor and TI announced that they had qualified and begun production of the industry's first fine pitch copper pillar flip chip packages—shrinking bump pitch up to 300% compared to then current solder bump flip chip technology.
-
Elpida tips 4-layer mobile DRAM package
Elpida Memory has come up with what it says is the thinnest available DRAM device, a new 0.8mm four-layer package of 2GB DDR2 mobile RAM chips, assembled using package-on-package (PoP).
-
Package-on-package: thinner, faster, denser
Executive Overview Package-on-package (PoP) has been an enabling technology for the integration of more features and functions in smart mobile devices. Because of the significant technical, business and logistics benefits package stacks provide, system designers are applying PoP to a wider range of
-
Package-on-package (PoP) track at SMTAI
The SMTA will host conference events with Amkor, Research in Motion, and TechLead Corporation on package-on-package (PoP) 3D stacking at SMTA International (SMTAI), October 16-20 in Fort Worth, TX.
-
-
Copper pillars appear in packages from Amkor to Unisem, says Vardaman
Following Intel's lead, many companies are moving to adopt copper pillar as the technology for their flip chip applications, as well as leadframe packages. E. Jan Vardaman, president of TechSearch International, says the move to Cu pillar is reminiscent of the transition from the evaporated bump to
-
Graphene transistors cool off at the nano level
University of Illinois researchers found that graphene transistors have a nanoscale thermoelectric cooling effect that can be stronger at graphene contacts than resistive heating, lowering the temperature of the transistor.
-
Will PoP delay TSV adoption? TechSearch International analyzes the 3D technologies
PoP provides a cost/performance solution that solves business and logistics issues associated with stacking devices directly. 3D TSV, with its associated uncertainties, cannot yet meet PoP's benefits, says TechSearch International (TSI).
-
The-evolution-of-a-memory-revolution
Sharon Holt, Rambus, makes the case for a kind of evolutionary revolution in memory -- one that essentially unifies the memory requirements of PCs/servers as well as smart phones/tablets. Holt says that continuing to increase the speeds of LPDDR while staying within power requirements can be a way
