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Package Assembly

Package Assembly news and technical articles from Solid State Technology Magazine. Search Package Assembly latest and archived news and articles

  1. Cypress Semiconductor transfers back-end packaging lines to China

    Article

    Tue, 27 Mar 2012

    Nasdaq:CY ) transferred 7 back-end semiconductor package assembly lines from its Philippines facility to Chinese packaging ..... Cypress' automotive end-customers. The conventional package assembly line transfer was successful from Cypress' standpoint

  2. Assembleon launches packaging toolset with low impact force

    Article

    Tue, 23 Aug 2011

    Assemblon is entering the packaging equipment market with the A-Series Hybrid, offering parallel placement technology for system-in- package assembly , multi chip module manufacturing, and flip chip bonding.

  1. The Fabless/Foundry Supply Chain

    Article

    Tue, 1 May 2012

    suppliers must collaborate in chip development. Early engagement, EDA tool flow optimization, turnkey wafer-to- package assembly , and other risk reduction strategies take a design from R&D into high-volume manufacturing. Nick Yu, VP of technology

  2. Inari proposes acquisition of Amertron

    Article

    Tue, 10 Jan 2012

    electronics manufacturing services, especially in semiconductor packaging, which comprises back-end wafer processing, package assembly and radio-frequency final testing for wireless microwave telecommunications semiconductor products. Learn more

  3. ST eliminates wafer probes for on-wafer die test

    Article

    Wed, 14 Dec 2011

    Sort (EMWS) was developed from Electrical Wafer Sort (EWS), performed at the end of wafer processing and before package assembly and final test . In EMWS, each die contains a tiny antenna. Automated test equipment (ATE) supplies power and

  4. Leading-edge semiconductor materials research at TECHCON 2011

    Article

    Fri, 16 Sep 2011

    September 16, 2011 -- Whether it's lead-free solder for package assembly or graphene for new transistors, semiconductor materials research was a dominant topic at Semiconductor Research Corporation

  5. Package-on-package: thinner, faster, denser

    Print

    Tue, 12 Jul 2011

    This density required thinning the FC silicon wafers to 100m and ensuring care in handling the component through package assembly , test and surface mount stacking to avoid die crack and edge chip out defects. Low power DDR speeds up to 167MHz

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