Lithographic
Lithographic news and technical articles from Solid State Technology Magazine. Search Lithographic latest and archived news and articles
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Si-Ware platform creates MOEMS on-wafer with lithographic alignment
Si-Ware Systems debuted the SiMOST platform to fab and package single-chip optical systems with validated MEMS components. Multiple MOEMS structures can be patterned and etched on SOI wafers using DRIE. The structures are then wafer-level packaged and diced.
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Fraunhofer partners for eco-friendly semiconductor clean chemistries
… for the microelectronics industry, specifically, removing lithographic materials from semiconductor wafers. During the two-year ..... examined if the new technology is suitable for the removal of lithographic laquers. Subsequently, the assessment will be expanded …
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Dow acquires LED phosphor technology IP in Lightscape Materials buy
… organic chemical vapor deposition (MOCVD) precursors for LED manufacturing, photoresists and related ancillaries for lithographic processing, metallization processes for electroplating, and pads and slurries for chemical mechanical polishing/planarization …
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Conference Report: MRS Spring 2012, Day 1
… Biocompatibility of PEDOT:TOS-PEG was successfully demonstrated. J1.6 Robert Mueller of IMEC described a low cost lithographic process for patterning S/D bottom contacts for high mobility p -type pentacene organic TFTs using silver bottom contacts …
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Metrology-aided gas purification development
… higher photoabsorption cross-sections would elicit low carbon and oxygen contamination levels in order to minimize damage to lithographic optics. Oxygen from dissociated water molecules can oxidize the mirror surface resulting in loss in reflectivity[2 …
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Evolution or revolution: the path for metrology beyond the 22nm node
… transition from conventional scaling-driven planar devices to complex 3D transistor architectures, redefining future needs for lithographic , defect, and films metrology solutions for high volume manufacturing. Evaluation of critical dimension (CD), roughness …
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Metallization processes for standardized wide-IO memory applications
… layer, under certain conditions this film grows selectively on silicon only and leaves the metal TSV plugs exposed – no lithographic step is required, and a cost-effective maskless backside isolation (MBI) layer deposition process is achieved, as shown …
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Leti on 3D CMOS and photonics interconnect
… bonding process, so you don’t need a very accurate pick and place process, you just do the cavity definition through the lithographic process.” With respect to bonding processes needed for photonics on silicon, Leti is investigating both wafer-to …
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Semiconductor metrology beyond 22nm: 3D memory metrology
… transition from conventional scaling-driven planar devices to complex 3D transistor architectures, redefining future needs for lithographic , defect, and films metrology solutions for high-volume manufacturing. Future 3D memory devices will include multiple …
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ISS kicks off with IC industry reality talks
… economy of $2.3T. Jim Koonmen, SVP & GM of Brion at ASML, brought us closer to home with the industrialization of new lithographic technologies. From a litho perspective, the “small knob” is not broken; device shrink is still a driver. Single …
