Home>Topics>Known Good Die
  1. All
  2. Article
  3. Text

Known Good Die

Known Good Die news and technical articles from Solid State Technology Magazine. Search Known Good Die latest and archived news and articles

  1. Inside the Known Good Die conference

    Article

    Wed, 17 Aug 2011

    August 17, 2011 -- The annual Known Good Die (KDG) conference will address semiconductor die testing ..... options and infrastructure. For more information on the Known Good Die conference, visit: http://meptec.org/meptecknowngoodd

  2. 3D integration: not a windfall for test

    Article

    Sun, 1 Jan 2012

    supply chain. To capitalize on this value redistribution, some in the test community are advocating the need for known - good - die (KGD) testing for every element of the 3D die stack prior to assembly. Intuitively, this is a reasonable approach

  1. TEL power chip dynamicing occurs at the wafer level

    Article

    Tue, 6 Dec 2011

    s experience in wafer probe technology . By detecting defects at the wafer-level, TEL's method ensures that known - good die (KGD) are used in multi-die power devices, which provide higher electrical efficiency and performance than traditional

  2. CSCD commissions curve tracers for on-wafer power device test

    Article

    Fri, 17 Jun 2011

    On-wafer characterization methods allow device test before dicing and backend packaging steps, which establishes known good die (KGD). The market for power transistors will continue to post healthy gains through 2014, according to IC Insights

  3. FormFactor next-gen DRAM tester contacts 850+ die in parallel

    Article

    Wed, 8 Jun 2011

    helped reduce pad damage with the SmartMatrix 100XP by as much as 15%. FORM expects this will allow cost-effective Known Good Die (KGD) testing for 3D applications. FormFactor Inc. (FORM) has shipped 600 Matrix-family wafer probe cards

  4. 3D packaging enters the mainstream: Attend the conference

    Article

    Tue, 1 Nov 2011

    interconnects is another major topic. Testing issues include the combination of internal and third-party silicon and known good die (KGD). The November 10 conference, "KGD in an Era of Multi-Chip Packaging and 3D Integration," will focus

  5. 3D integration: Bringing it home with supply-chain buy-in

    Article

    Thu, 19 May 2011

    sort of standards and conventions between the supply chain hand-offs." One example is the quality of a stack of known good die (KGD). "If we have a stack of memory, what is meant by a known good stack of memory? Who's going to be responsible

© 2012. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS