Interconnect Design
Interconnect Design news and technical articles from Solid State Technology Magazine. Search Interconnect Design latest and archived news and articles
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IEEE IITC keynotes to come from Intel, NVIDIA
… Exhibition attracts professionals from industry, academia, and national laboratories in semiconductor processing, interconnect design , and equipment development. Conference topics include both fundamental and applied research, as well as issues …
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IITC Day 0: Short course reflects interconnects' maturity
… for compatibility with porous SiOCH materials. Ron Ho of Oracle's Sun Labs talked quite enthusiastically about interconnect design considerations for multi-core processors. The underlying goal is to make off-chip I/O as inexpensive and …
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Advanced tools for HDI design
… being forced further into the realm of high density interconnect . Design techniques and substrates labeled exotic only a ..... removes much of the uncertainty of high density interconnect design , allowing design teams to take full advantage …
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Technology News
… efforts have given rise to a fundamentally different approach to interconnect design , the X Architecture. Jointly developed by Toshiba Corp ..... focus on removing barriers to adopting this new approach to interconnect design . R.D.
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Diagonals: A shorter path for interconnect
… efforts have given rise to a fundamentally different approach to interconnect design , the X Architecture. Jointly developed by Toshiba Corp ..... to focus on removing barriers to adopting this new approach to interconnect design .
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IITC REPORT: Rethinking and reworking IC interconnects
… mask (TFHM) approach, optimizing bond pad and interconnect design rules, and careful attention to assembly techniques ..... found that optimization of bond pad design and interconnect design rules must consider the stress distributions associated …
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Cadence Improves Co-design Platform
(May 15, 2007) SAN JOSE, CA Cadence Design Systems, Inc., released product and technology enhancements within its Allegro system interconnect design platform for PCB design, including constraint-driven flow and global routing.
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Cadence updates PCB design platform
April 26, 2006 - Cadence Design Systems Inc., San Jose, CA, is releasing a revised system interconnect design platform to simplify and streamline designs for printed circuit boards, extending a "segmented" product strategy already used …
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SEMATECH, supplier develop CMP system
… Rajeev Bajaj explained that eSQ allows planarizing contact at the die level, enabling precise control that meets interconnect design tolerance for dishing and erosion for 45nm process manufacturing. The system's 3D design helps eliminate "edge …
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Stacking chip-scale packages
… can become a viable solution to achieve higher memory capacities in industry-standard form factors, but new interconnect design concepts are needed. The stacking overhead must be kept to a minimum so module sizes comply with JEDEC standards …
