Device Architecture
Device Architecture news and technical articles from Solid State Technology Magazine. Search Device Architecture latest and archived news and articles
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PV ribbon-attach conductive adhesive from ECM suits Sn, SnAg, Ag
Engineered Conductive Materials LLC launched the DB-1538-2 conductive stringer attach adhesive with reported low bleed on TCOs and a wide operating temperature range.
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Semiconductor gases bounce back, wet chemicals on their way
Semiconductor wet chemicals saw 13% growth year-over-year in 2010, while the electronics fab gasses market grew 16%, according to 2 new reports from Techcet Group.
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AMAT debuts DRAM fab tools for denser transistors
Applied Materials debuted 3 systems for next-generation DRAM chip manufacturing: the Applied Centura DPN HDTM system to improve the gate insulator scaling; the Applied Endura HAR Cobalt PVD system for high-aspect-ratio contact structures; and the Applied Endura Versa XLR W PVD system for reduced ...
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Extending optical lithography with complementary e-beam lithography
David Lam summarizes how the industry does not have to "throw out" optical lithography as it proceeds to more advanced nodes -- complementary e-beam lithography (CEBL) is part of the overall solution, "complementary lithography," that can overcome the resolution limitations of 193i technology.
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TSV moves to "real engineering," but reliability data needed
Jan Vardaman, president and founder of TechSearch International, summarizes highlights from her SEMICON West presentation on TSVs, speaking to RDL development, LED packaging, and TSV-alternative PoP.
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AMEC reactive ion etch tool enables sub-28nm nodes
AMEC launched its Primo 300mm very-high-frequency advanced decoupled reactive ion etch tool for sub-28nm. AMEC's Ben Lee describes the tool's mini-batch cluster architecture, and the physics that makes it work.
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FDSOI improves CMOS scalability, speed, power consumption at 11nm
Leti has demonstrated the ability of fully depleted silicon on insulator (FDSOI) technology to improve CMOS scalability down to the 11nm node, together with an associated variability reduction of the electrical characteristics by a factor of two compared to regular technologies.
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Power management ICs for green energy applications
Executive Overview The power management IC (PMIC) has become a critical component in virtually every electronics product today. Much of this demand is being fueled by the global transition to green energy solutions. Highlighted will be a 0.18m BCDMOS process with 30V LDMOS transistors having an Rsp
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Performance enhancements for multi-die DRAM packages
R. Crisp, et al., Tessera, San Jose, CA USA; W. Chang, et al., Powertech Technology Inc., Hsinchu, Taiwan, R.O.C
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One year later: Amkor/TI high-density copper pillar bump technology
In late June 2010, Amkor and TI announced that they had qualified and begun production of the industry's first fine pitch copper pillar flip chip packages—shrinking bump pitch up to 300% compared to then current solder bump flip chip technology.
