3D Integration
3D Integration news and technical articles from Solid State Technology Magazine. Search 3D Integration latest and archived news and articles
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Korean IDM orders NEXX tools for WLP metallization
NEXX Systems installed 2 300mm Stratus deposition at a Korean IDM for high-volume wafer-level packaging processes.
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CEA-Leti Annual Review: The heart of Europe's semiconductor industry challenges
At CEA-Leti's Annual Review, Leti CEO Laurent Malier noted how the important role that research and technology organizations should play in strengthening industry in Europe, and how their roles differ from groups in other regions.
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TSV moves to "real engineering," but reliability data needed
Jan Vardaman, president and founder of TechSearch International, summarizes highlights from her SEMICON West presentation on TSVs, speaking to RDL development, LED packaging, and TSV-alternative PoP.
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One year later: Amkor/TI high-density copper pillar bump technology
In late June 2010, Amkor and TI announced that they had qualified and begun production of the industry's first fine pitch copper pillar flip chip packages—shrinking bump pitch up to 300% compared to then current solder bump flip chip technology.
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World News
BUSINESS TRENDS VLSI tool champs prove customer service matters VLSI Research's out with its annual "Best supplier" rankings, and there's a tie atop the leaderboard. Nine-time champ Varian Semi. Equip. Assoc. and first-timer Novellus both scored 8.18 in the "large supplier" category of chipmaking
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Day 1: Intersolar wanderings, SEMICON West symposium
Techcet's Michael A. Fury reports from busy aisles at Intersolar, and at SEMICON West where a private symposium by CEA Leti reviewed work in FDSOI, 3D integration, TSVs, silicon photonics, and MEMS for medicine.
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SEMICON West Day 2: CMP views, outlooks for breakfast
Techcet's Michael A. Fury continues his reporting from SEMICON West, reviewing talks at the NCCAVS CMP User Group forum, as well as a breakfast seminar with outlooks on the semiconductor and related industries.
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SigmaTech TSV metrology wins Best of West
SigmaTech's UltraMap-TSV system won Best of West at SEMICON West, presented by industry association SEMI and Solid State Technology.
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3D IC with TSV show significant advances in last 12 months
Dr. Phil Garrou summarizes the significant commercial strides made over the past 12 months in 3D IC integration -- as defined vs. other "3D" technologies -- thanks to the promised combination of low cost and high performance.
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TSV zen comes down to wafer processing balance
3D semiconductor packaging processes involve various groups, and standards are important in the hand-offs between them, explains Mark Berry, sales director at Metryx. He covers how to use metrology to protect wafer yields in 3D packaging.
