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special set of semiconductor production tools to create through-silicon vias (TSV) in 20nm node semiconductor wafers . 3D die stacking of leading-edge chips will enable mobile and consumer electronics. The first full-flow silicon with TSVs
redistribution, some in the test community are advocating the need for known-good-die (KGD) testing for every element of the 3D die stack prior to assembly. Intuitively, this is a reasonable approach. After all, who would want to kill a good 7-die
associated with bad die. Also, heterogeneous technologies (different sizes, feature dimensions, etc.) can be bonded in 3D die stacks with a broad range of functionality (logic, memory, mixed signal, photonics, etc.) in a compact form factor