Invensas debuts high-I/O PoP semiconductor packaging design
May 22, 2012
Invensas Corporation, Tessera subsidiary, debuted bond via array (BVA) technology, an ultra-high-I/O PoP semiconductor packaging alternative to wide-I/O TSV packaging. |
Amkor plans semiconductor packaging and test facility in Korea
May 19, 2012
Amkor Technology Inc. (NASDAQ:AMKR) plans to build a state-of-the-art factory and global research and development center in the Incheon Free Economic Zone, which is located in the greater metropolitan area of Seoul, Korea. |
"3.5D interposer technology could someday replace PCBs" -- TSMC's Doug Yu
May 15, 2012
TSMC’s Doug Yu challenged the current nomenclature and pronounced that interposer technology should be called “3.5D” instead of 2.5D, since it is and will be capable of much more than the simple 3D packaging stack. |
Lithography challenges for leading edge 3D packaging applications
May 7, 2012
The lithography challenges associated with TSV fabrication for various devices structures are investigated. Warren W. Flack, Manish Ranjan, Gareth Kenyon, Robert Hsieh, Ultratech, Inc., San Jose, CA. John Slabbekoorn, Andy Miller, imec, Leuven, Belgium |
David McCann of GLOBALFOUNDRIES to speak at The ConFab 2012
May 3, 2012
Solid State Technology is proud to announce that David McCann will speak at The ConFab 2012. David, the Senior Director for Packaging R&D at GLOBALFOUNDRIES in Malta, New York, will speak on the evolution toward silicon-based interconnect and packaging, which is having profound impact on how ...
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The Micron Memory Cube consortium
May 1, 2012
Micron has joined with Samsung to create the "Hybrid Memory Cube (HMC) Consortium" with fellow founding members Altera, Open Silicon, and Xilinx. IBM will be manufacturing the the logic layer. |
What have we done for you lately?
May 1, 2012
This page is usually reserved for a guest editorial by someone in the industry that wants to rant a little bit about the lack of standards in any given area, the need to get young students interested in engineering and the sciences, why fab safety is so important, or answering the call to innovat...
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Interposer consortium ready to expand at Georgia Tech PRC
Apr 26, 2012
After pioneering low-cost wafer- and panel-based glass and silicon interposers in Phase 1 of its SiGI consortium, Georgia Tech Packaging Research Center is beginning Phase 2 in June. |
GLOBALFOUNDRIES installs TSV fab tools for 20nm stacked die
Apr 26, 2012
At its Fab 8, GLOBALFOUNDRIES is installing a special set of production tools to create TSV in 20nm wafers. 3D die stacking of leading-edge chips will enable mobile and consumer electronics. |
SEMATECH highlights from VLSI-TSA
Apr 26, 2012
SEMATECH experts reported on innovative processes for advanced CMOS logic and memory device technologies and 3D TSV manufacturing at the International VLSI Technology, System and Applications Symposium (VLSI-TSA). |
STATS ChipPAC adds Pasquale Pistorio, STMicroelectronics leader, to Board
Apr 23, 2012
Semiconductor packaging service provider STATS ChipPAC Ltd. (SGX-ST:STATSChP) appointed Pasquale Pistorio as a member of the Board of Directors, effective immediately. |
ASMC will focus on productivity and technology challenges
Apr 18, 2012
The 23rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2012) will be held May 15-17 in Saratoga Springs, New York. The conference will feature presentations of more than 85 peer-reviewed manuscripts covering critical process technologies and fab productivity. This year’s event...
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Conference Report: MRS Spring 2012, Day 3
Apr 12, 2012
Blogger Mike Fury reports from the MRS Spring 2012 meeting in San Francisco. Highlights from the third day: leakage and TDDB in low- κ dielectrics, flexible energy storage and conversion, Mn capping layers and diffusion barriers, hard masks for Cu interconnects, nanogenerators, Cu in RF, flexible...
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Economy, fabless relationships, 450mm and more on deck at The ConFab 2012
Apr 11, 2012
The ConFab 2012, an invitation-only global conference and business meeting on semiconductor manufacturing, June 3-6 in Las Vegas, selected speakers and sessions for 2012. |
Georgia Tech targets thin 3D packaging with new consortium
Apr 11, 2012
Georgia Tech's Packaging Research Center proposes a new consortium on 3D semiconductor packaging called 3D ThinPack for ultra-miniaturized 3D heterogeneous, RF, digital and power modules in partnership with global companies. |
Conference report: MRS Spring 2012, Day 2
Apr 11, 2012
Blogger Mike Fury reports from the MRS Spring 2012 meeting in San Francisco. Highlights from the second day: OLED TFT displays, single transistor DRAMs, silicon photonic wires, CNTs, 3D optical interconnects, graphene for RF and sensing, transparent ZnO, epidermal electronic systems, stretchable ...
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ALD enables 3D capacitors for CEA-Leti and IPDiA
Apr 10, 2012
CEA-Leti and passive component maker IPDiA developed an atomic layer deposition (ALD) process to apply medium-k dielectric layers on a metal-insulator-metal capacitor architecture, enabling 3D capacitors. |
Endicott Interconnect names David Van Rossum new CFO
Apr 10, 2012
Endicott Interconnect Technologies has appointed David W. Van Rossum to the position of Chief Financial Officer, effective immediately. |
MOSAID multi-chip package stacks 16 NAND Flash die on 1 channel
Apr 5, 2012
MOSAID Technologies Inc. is sampling a 16-die stack NAND Flash device operating on a single high-performance channel, the 5126Gb HLNAND. |
Georgia Tech increases interposer development work
Apr 4, 2012
Georgia Tech's Packaging Research Center is adding ultra-fine-pitch interconnect, thermal reliability, and more to its work on silicon and glass interposers for 2.5D semiconductor packaging. |
