A new generation of nanotechnology-based wet-process films provides process simplification, performance boost and cost reduction beyond TSVs. Claudio Truzzi, Alchimer, Massy, France

The USPTO is looking to increase the diversity of honorees for its annual National Medal of Technology and Innovation (NMTI), honoring "this nation's creative geniuses."

Silex Microsystems joined Energy-efficient Piezo-MEMS Tunable RF Front-End Antenna Systems for Mobile Devices to develop TSVs, PZT thin films, and other technologies for high-performance RF systems targeting mobile devices.

Sony has developed a backside-illuminated CMOS image sensor that layers the pixel section with back-illuminated structures over the chips containing signal processing circuits, instead of using supporting substrates.

Minco Technology Labs, hi-rel semiconductor die processing, packaging and test provider, appointed board member Bill Bradford as president and CEO.

Samsung Electronics began producing embedded multi-chip package (eMCP) memory for use in entry- to mid-level smartphones. The products use low power double-data-rate 2 (LPDDR2) 30nm DRAM and 20nm NAND flash memory.

Optomec opened its new and expanded Advanced Applications Lab and Product Development Facility in St. Paul, MN. The facility will help Optomec grow its Aerosol Jet additive manufacturing technology for advanced printed electronics applications.

For the first time, Apple Inc. has publicly published a list of over 150 companies that the electronics giant says represent 97% of its procurement expenditures for materials, manufacturing, and assembly of products worldwide.

Increased I/O density, power/performance reqs, and other factors are increasing use of flip chip, 2.5D and 3D technologies, a boon to packaging subcontractors. But they face a challenge from foundries, and must navigate under-utilization of wire bonding capacity.

Teledyne Microelectronic Technologies will expand its optical packaging portfolio in a partnership with Zephyr Photonics, which makes a proprietary high-temp vertical-cavity surface-emitting laser (VCSEL).

Packaging house Inari Berhad signed an MOU to acquire Amertron Global, which operates in the Philippines and China providing microelectronics and optoelectronics manufacturing services.

JEDEC Solid State Technology Association released a new standard for wide I/O mobile DRAM: JESD229 Wide I/O Single Data Rate. Wide I/O mobile DRAM increases die integration -- stacking chips with TSV interconnects with a SoC -- and improves bandwidth, latency, power, weight, and form factor.

The benefits of 3D IC integration can be combined with aggressively scaled 22nm semiconductor devices, with More Moore (scaling) and More than Moore (package advances) developing in parallel but relatively independently, says Paul Lindner, EV Group (EVG).

Art Zafiropoulo of Ultratech shares predictions for 22nm: that everyone will be using gate-last fabrication, that there may be a mid-node at 20nm, and that TSVs and 450mm wafers will play an important role at the new node.

After a seemingly interminable run of being “a year away,” it is clear that 3D integration (or at least the silicon-interposer-enabled 2.5D version) now offers a viable path to achieve the performance, cost, and feature integration required of next-generation mobile devices.

The readiness of suppliers to offer 2.5D packaging technologies was in full debate at the RTI 3D ASIP event this month, with presentations and rumors questioning how soon customers will need 2.5D/3D, and whether some offerings are worth the investment.

The Global Semiconductor Alliance released "3D IC Architecture: A Natural Evolution," a report sponsored by Macronix International and Etron Technology. GSA also published the 2nd edition of the 3D IC Design Tools and Services Tour Guide.