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Sustainability Commitment A Key Driver for Product Development There's a lot of talk about sustainability these days. While some firms have truly embraced a plan to drive toward more environmentally responsible products and operations, many still haven't adopted sustainability objectives as part of their corporate culture. (Jul 20, 2009, Henkel Corporation) |
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Using Hansen Space to Optimize Solvent Based Cleaning Processes
What is an optimized cleaning process? Is it based solely upon removing the residue, or is it more? Of course it is more. We do not want to remove the labels or other parts markings, or degrade or damage the substrate of individual components. It is not desirable to swell elastomers or create new residues or otherwise affect the product being built. Dissolving manufacturing residues, without affecting the materials of construction, is difficult when working with organic solvents and solvent blends. Water being the great solvent that it is, is all around us. We generally design our widgets to be compatible with water. On the other hand, solvents and solvent blends are not routinely found in the environment in which our widgets are used. Why would a designer design a widget to be tolerant of organic solvents? (Jun 15, 2009, Austin American Technology Corp.) |
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Breakthrough Package-Level Lead-Free Alloy Addresses Board-Level Alloy Challenges Not all SAC alloys are created equal: Especially when attempting to use board-level recommended SAC alloys for package-level applications. (May 4, 2009, Henkel Corporation) |
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Small Times University Report and Rankings - 2009 Small Times' annual survey identifies which institutions are the "best of the best" in micro- and nanotechnology, gauging capabilities and strengths in research and commercialization, as well as rankings as chosen by their peers. For 2009, the top university in "Research" was a close race; for "Commercialization" it was a landslide. And as we compiled the data and talked with schools, it became clear that an important trend is shifting the dynamic nature of university R&D. (Apr 21, 2009, EV Group) |
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Dual Channel Pulse Testing Simplifies RF Transistor Characterization Device engineers and test managers are under tremendous pressure to make sure products get to market quickly and perform reliably. This is especially true of RF transistors destined for hot communications market segments. Whether the technology is based on III-V compounds or LDMOS, RF transistor tests must accurately characterize design and performance and do it cost effectively. Pulse I-V (PIV) testing is becoming indispensable in meeting these goals, because it avoids the negative effects of self-heating and transient trapped charges, which usually result in misleading data. (In the testing of compound semiconductors, dispersion is the terminology used to describe self-heating and carrier trapping basically anything that causes DC test results to differ from pulse I-V test results.) (Apr 17, 2009, Keithley Instruments) |
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Industrial Applications Demanding Low and High Resolution Features Realized by Soft UV-NIL and Hot Embossing There are several applications either currently in production or in late stage R&D, for UV-based Nanoimprint Lithography (UV-NIL) and Hot Embossing (HE) that require a full-field imprint technology in order to make these processes either feasible or cost-effective. These applications cover a wide range of features sizes from the millimeter range down to sub-100 nm. Because of the total thickness variation (TTV) associated with the imprinted substrates, full-field imprinting requires fabrication of a "soft" or "working" stamp from a "hard" stamp usually made from materials such as nickel, quartz or silicon. Several materials and processes have previously been identified that allow for full-field imprinting, however, these materials all have drawbacks associated with them that hinder their movement into High Volume Manufacturing (HVM) environments. EV Group Inc (EVG) has, in cooperation with our NILCOM(TM) partners, identified a novel set of polymeric materials and stamp fabrication processes that allow for full-field imprinting solutions suitable for these HVM environments. These materials have proven effective for imprinting at both millimeter feature sizes all the way down to 50 nm - full field. These materials, and the processes associated with their fabrication into working/soft stamps, should allow for a superior cost-of-ownership benefit and facilitate the movement of imprint lithography into industrial applications. (Apr 8, 2009, EV Group) |
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Challenging Flip Chip Applications No Problem for New Underfill Technology The benefits of flip chip technology for advanced device applications have been well proven. With advantages such as more efficient electrical interconnections, smaller device footprints and increased I/O counts, flip chip technology has gained favor among package designers and electronic product OEMs in recent years. While the reliability of flip chips in smaller footprint packages such as BGAs, CSPs and the like has been established, large die (20 mm and above) flip chips for applications such as ASICs, video chips and microprocessors are subjected to more stress due to the large die size and, thus, may face processing and reliability challenges not shared by their smaller footprint flip chip counterparts. Plus, these larger devices can be even more challenging when they are bumped with lead-free solder, as Pb-free materials tend to have less solder fatigue resistance. Newly developed underfill technology, however, addresses these challenges along with the hurdles of lead-free flip chips, helping device manufacturers realize all the benefits of this versatile technology without the problems often associated with large die flip chip processing. (Mar 31, 2009, Henkel Corporation) |
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High Precision Ion Beam Milling with Time of Flight Compensation Advanced circuit editing (CE) becomes more and more difficult as semiconductor structures shrink. Time of Flight (ToF) compensation noticeably extends the utility of advanced CE for small geometries. ToF compensation in the ion-column deflection system increases beam placement accuracy and consequently pattern accuracy by reducing dwell times to as short as 50 nanoseconds. The authors of this paper have validated this approach through machining and filling 50-nm vias. Read the paper to learn how FIB operators can drastically shorten dwell times and pixel rates to improve gas milling and deposition activities. (Feb 11, 2009, FEI Company) |
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Backside Circuit Edit on Full-Thickness Silicon Devices Backside Circuit Edit (CE) techniques, in which a Focused Ion Beam (FIB) operator accesses critical circuitry through the substrate of an IC, are popular with processor manufacturers and users of FlipChip and BGA-style packages. However, the thinning, polishing and etching required for backside CE might make sample chips too fragile to withstand the electrical tests. This paper explores the use of backside CE on full-thickness silicon devices instead. It shows how modern IR camera technology combined with advances in silicon trenching, navigation and positioning can make the full-thickness approach very viable for the FIB operator. (Jan 22, 2009, FEI Company) |
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Next Best Thing to a Close Shave: Mitigating the Risks of Tin Whiskers
by Brian Toleno, Ph.D., Henkel Corporation If you've been in electronics for any length of time, the phenomenon of tin whiskers is something you've likely heard discussed (maybe in scared whispered tones). Tin whiskers certainly aren't a new problem. (Jan 14, 2009, Henkel Corporation) |
