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Sep 17, 2009
The use of new packaging methods enables production of IC's with reduced cost, lower power consumption, small form factor, higher performance and increased yield and reliability. The realization of vertical interconnected devices or chips using Through-Silicon Vias (TSV's) is one of the key emerging trends in wafer level packaging. 3D integration can be seen as a paradigm shift of the semiconductor industry, which has improved device performances by shrinking gate dimensions according to Moore's Law. 3D integration, by exploiting the vertical dimension, provides an opportunity to continue to achieve the performance levels required by the extrapolation of Moore's law, but using a different technological approach ("More than Moore approach"). The rapid adoption of 3D integration technology seems to be essential as the industry paradigm is shifting to a new industry-fusing technology era that will offer tremendous global opportunities for expanded use of 3D silicon-based technologies in highly integrated systems. The webcast will focus on the process integration, with speakers from market research and consultancy, industry and equipment side giving an update on the industrial 3D-IC landscape, user requirements and process challenges and solutions.
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Jun 25, 2009
This webcast will explore advances in c-Si PV cell efficiency and manufacturing technologies.
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May 06, 2009
Universities have evolved over the years from places of higher learning and basic research to well-funded powerhouses that are hubs of industry development and commercialization. They are not only home to the country's most promising technology incubators, but true centers of education, often reaching out to the local community's grade school and high schools to share the excitement and opportunities of nanotechnology, science and engineering.
Successful universities are judged not only by the amount and quality of the basic research they do, but also on their capabilities to do mid- and short-term research and how quickly they are able to help industry partners turn new technologies into commercial products.
In this webcast, we?ll discuss the evolving nature of R&D, the role universities play and the importance of a multi-disciplinary, multi-university approach. We will also present this year's university rankings for research and commercialization based on our annual survey.
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Mar 27, 2009
Hosted by RenewableEnergyWorld.com and moderated by Chief Editor of Renewable Energy World Magazine, Jackie Jones, this PV manufacturing-focused webcast will cover such topics quality control and minimizing waste, as well as up-scaling efficiency and how to move from fairly small to large-scale automation.
Dr. Gerhard Holst, Head of Research & Marketing Director, PCO AG, will be speaking on quality control in solar cell manufacture and present a case study around the "pco.1300 solar" camera product line. PV Group's Eddy Blokken, Director technology and standards, SEMI Europe/PV Group, Brussels, Belgium will discuss the present and future of the PV Manufacturing environment.
Sep 18, 2008
The wafer-level capping of fragile MEMS structures (e.g. for accelerometer, gyroscopes and pressure sensors) for protection and sealing purposes with wafer bonding is quickly displacing chip-scale packages. Especially for novel consumer MEMS applications (see the Apple iPhone or the Nintendo Wii) that have to keep record-small form factors, wafer bonding is a major contributor to reduce the manufacturing costs of the final package. New bonding schemes for "true" wafer-level-packages (protection, interconnection and testing at the wafer level) are being discussed with regards to market potential and equipment requirements.
The successful technology transfer of wafer bonding and related advanced manufacturing technologies from MEMS packaging into 3D wafer stacking of CMOS based applications (e.g. CIS packaging, DRAM stacking) will be another major topic of this webcast.
Jun 26, 2008
Convergence of front and back end process and technologies are driving successful high yielding examples of 3D devices to head into early markets. Continued success of 3D products relies on continued improvements across the 3D segments. Experts will address three of the key challenges to 3D implementation; TSVs, Bonding, and Thin Wafer Handling.
Apr 30, 2008
Electronics manufacturing is driven towards further integration and miniaturization. This process generates a need for improved manufacturing technologies for IC-based stacked modules. One method for improving the manufacture of 3D interconnection pattern technology is based on photo lithography for low cost miniaturization, cost reduction, and design freedom. Building the latest in new stacked components involves using processes that require precision imaging. This webinar covers lithography applications for 3D packaging by looking at image sensor packaging, and 3D lens printing. A user reviews which equipment can be used for lithography and use challenges for it. Presentations will be given from industry experts such as Dr. Michael Toepper from Fraunhofer IZM or Dr. Dietrich Toennies, Business Development Manager Mask Aligners at SUSS MicroTec. This webinar is critically important for engineers and management seeking practical information on lithography for use in 3D packaging.
Mar 25, 2008
Many socket manufacturer designs meet the needs of a wide range of customers. Test sockets must be able to survive a high-volume environment, producing high yields, excellent repeatability, and match an array of package formats. To match the exact interconnect solutions needed, some companies offer innovative custom designs. For high performance fine pitch 0.5mm QFN packages, sockets must be able to dissipate several watts without extra heat sinks. Today's sockets must accommodate the latest and more outdated IC package styles no matter the format - from BGA to QFN and many others. This webinar features a wide discussion of how to find, fit, and use the latest socket materials, designs, and resources by asking industry experts direct questions. For trends on where the industry is headed, an industry guru will forecast the numbers, revealing the forces behind each trend. Toward the end of the webinar, attendees may submit questions to the presenters. If you only attend one socket seminar this year, "Sockets That Meet Today's Needs" should be that important one.
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Mar 04, 2008
RF and higher power transistors suffer from self-heating and/or trapping effects. These effects, also called dispersion, result in a non-linear response at higher signals. To model the non-linear behavior properly, large signal characterization must be performed. Using pulse IV techniques to characterize the large signal behavior is popular because the interpretation of results leverages existing DC analysis and understanding.
What you will learn:
Jan 17, 2008
3-dimensional (3D) packaging exploits the third or Z height dimension to offer a solution for higher integration and performance. Though one begins with known good die (KGD) and pre-tested packages, the reliability of the integrated package is determined using specific steps. Reliability assurance includes moisture resistance testing, autoclave, temperature/humidity, and at the board level thermal cycling. All of the tests that determine if the "whole" structure is sound are discussed in this important webinar. Experts discuss materials used to support multiple layers, such as underfill, solder balls, and interposers. Final test requires more than one tester and a design allowing access to all chips and packages through dense pin designs. Everyone involved in building 3D packages should attend this specific webinar, because even if you build a better integrated 3D package, reliability testing is proof that it will work.
