Novellus Systems (NASDAQ: NVLS) created an advanced copper barrier-seed physical vapor deposition (PVD) process for the emerging through-silicon-via (TSV) packaging market. The process uses Novellus’ established INOVA platform with patented hollow cathode magnetron (HCM) technology to produce highly conformal copper seed films that are reportedly four times thinner than the conventional PVD seed approaches used for TSV applications. Novellus announced that the HCM TSV process delivers excellent sidewall and bottom coverage, and enables void-free copper fill during the subsequent TSV electroplating step.
Allvia says it has integrated embedded capacitors on silicon interposers, a key interface between silicon devices and organic substrates, achieving >1500nF/cm2 capacitance.
Ian Clark from Mentor Graphics explains how the company's new FloTherm Web-based software helps reduce the time spent on thermal characterization and design, illustrated by examples for both moving air and ambient thermal resistance.
Given the advantages and technical feasibility of through-silicon vias (TSV), the major focus now is on the manufacturability and integration of all the different building blocks for TSVs and 3D interconnects. EV Group's Thorsten Matthias et al. review advances in lithography, thin wafer processing, and wafer bonding, and the integration of all these process steps.
The Burn-in & Test Socket (BiTS) Workshop will take place March 7–10, 2010 at the Hilton Phoenix East/Mesa Hotel in Mesa, AZ. More than 30 papers and posters will be presented; participants include end users and suppliers of sockets, boards, burn-in systems, handlers, and packages; and other related equipment, materials, and services. The TechTalk session on PCB design, fabrication and assembly is booked full, as is the tutorial on RF socket characterization by Gert Hohenwarter, Ph.D. of Gatewave Northern Inc. Here are some of the show highlights.
Worldwide semiconductor capital equipment spending is projected to surpass $29.4 billion in 2010, a 76.1% increase from 2009 spending of $16.7 billion, according to Gartner Inc. Gartner cites a dramatic recovery in semiconductor orders for the equipment order surge.
Electro Scientific Industries Inc. (Nasdaq: ESIO), a provider of photonic and laser systems for micro-engineering applications, appointed a new member, David Nierenberg, to its Board of Directors. Nierenberg, with professional experience in investing and management consulting, comes to ESI with significant expertise in strategic planning and corporate governance matters.
Tessera Technologies Inc. (Nasdaq:TSRA) semiconductor packaging subsidiary, Tessera Inc., signed a technology licensing agreement with Nanium S.A. Nanium, formerly known as Qimonda Portugal, previously was the largest semiconductor packaging assembly and test operation within Qimonda. Nanium has now reorganized as an independent company and will focus on providing assembly and test services for the DRAM memory market and other semiconductor products. Products manufactured by Nanium will be incorporated into computers, servers and various electronic devices such as MP3 players, mobile phones, cameras, and game consoles. The initial term of the license agreement runs through the end of 2017.
System Plus Consulting released its new reverse costing analysis of the enhanced Wafer Level BGA (eWLB) packaging used in the X-GOLD 213 circuit from Infineon. eWLB is a ball grid array (BGA) package based on the emerging fan-out wafer-level package (FO-WLP) concept. All the packaging operations are done at the wafer level, and a fan-out area is provided to extend the package size beyond the IC surface area to allow for higher ball counts. The ball pitch is 0.5mm and only one redistribution layer is used for this 217 balls, 8 × 8mm package.
ICAP Ocean Tomo, the intellectual property brokerage division of ICAP Plc (IAP.L), is offering for sale a patent portfolio relating to wafer-level semiconductor packaging owned by Hymite A/S. The 77 issued U.S. and foreign patents and patent applications cover new packaging technologies for optical communications components, LED emitters, and semiconductor fabrication.
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ElectroIQ, the portal for electronics manufacturing, is the new home for Solid State Technology (semiconductors), Photovoltaics World (photovoltaics), Advanced Packaging (packaging), Small Times (nanotech/MEMS) and SMT (surface mount technology). To learn more about ElectroIQ, read the press release.
