Execs from Novellus Systems describe how the company's new Sola xT ultraviolet thermal processing system addresses high-volume manufacturing of advanced logic devices at 45nm and below -- and how it potentially stacks up in wafer-to-wafer performance vs. competitors' offerings.
ASM exec Shawn Thomas explains to SST how the company's new PowerFill process, which enables void-free filling of deep trenches with doped, epitaxial silicon, addresses needs for smaller die sizes and on-state resistance of power management devices.
Veeco exec Jim Jenson explains the workings of the company's new MOCVD tool targeting high-volume high-brightness LED manufacturing, a market expected to triple in the next four years to $15B.
A two-step plasma cleaning process proves to be a fast and effective method of maintaining a high uptime and high productivity for ALD of Ti- and Ta-based electrode materials, reports Aviza Technology and Pivotal Systems.
A flexible, forward-thinking platform will be vital to meet cost and productivity challenges of 450mm and beyond. John Klawender and Terry Bluck from Intevac describe the concept and capabilities of a universal platform, with test and system modeling results.
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Dual Channel Pulse Testing Simplifies RF Transistor Characterization
Device engineers and test managers are under tremendous pressure to make sure products get to market quickly and perform reliably. This is especially true of RF ... Sponsored By:
Keithley Instruments
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High Precision Ion Beam Milling with Time of Flight Compensation
Advanced circuit editing (CE) becomes more and more difficult as semiconductor structures shrink. Time of Flight (ToF) compensation noticeably extends the utility ... Sponsored By:
FEI Company
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Backside Circuit Edit on Full-Thickness Silicon Devices
Backside Circuit Edit (CE) techniques, in which a Focused Ion Beam (FIB) operator accesses critical circuitry through the substrate of an IC, are popular with processor ... Sponsored By:
FEI Company
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Recent Developments in TEM Applications for the IC Industry
Scaling ICs to the 45-nanometer node or beyond requires precise measurement of film thickness, interfacial roughness, and chemical distribution. At those nodes, ... Sponsored By:
FEI Company
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A New Method of Wafer-Level Plan-View TEM Sample Preparation by DualBeam
Transmission electron microscopy (TEM) is extremely important for obtaining high-resolution images with high materials contrast. Until now, plan-view TEM samples ... Sponsored By:
FEI Company
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