Progress has been made on double-patterning lithography and EUV, but in the end, chipmakers must decide which technology to use based on availability, cost, and product roadmap requirements, notes Stefan Wurm from SEMATECH.
Because of the limitations of 193nm lithography, much of the shrink capability comes from computational lithography, with software-driven advancements in optical proximity correction (OPC) and resolution enhancement technology (RET). James Word and Xima Zhang from Mentor Graphics discuss solving the computational load challenges that arise from the industry's increasing complex lithography roadmap.
Microbridging defects have emerged as one of the top yield detractors in immersion lithography at the 32nm node and beyond. This study from Entegris, IMEC, and Sokudo examines the effect of point-of-use filtration and how it is best used to mitigate microbridging defectivity.
E-beam direct write lithography using character projection capability has the potential to enable maskless production for systems-on-chip at leading-edge technology nodes. Advantest and D2S describe their collaborative work that yielded a 4× increase in the number of characters available on EBDW stencil masks, a key factor in achieving the throughput increase needed to make maskless SoCs practical.
Toshiba Corp. says it has developed a high-resolution photoresist specifically for extreme ultraviolet (EUV) lithography, viable to the 20nm-scale generation.
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Dual Channel Pulse Testing Simplifies RF Transistor Characterization
Device engineers and test managers are under tremendous pressure to make sure products get to market quickly and perform reliably. This is especially true of RF ... Sponsored By:
Keithley Instruments
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High Precision Ion Beam Milling with Time of Flight Compensation
Advanced circuit editing (CE) becomes more and more difficult as semiconductor structures shrink. Time of Flight (ToF) compensation noticeably extends the utility ... Sponsored By:
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Backside Circuit Edit on Full-Thickness Silicon Devices
Backside Circuit Edit (CE) techniques, in which a Focused Ion Beam (FIB) operator accesses critical circuitry through the substrate of an IC, are popular with processor ... Sponsored By:
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Recent Developments in TEM Applications for the IC Industry
Scaling ICs to the 45-nanometer node or beyond requires precise measurement of film thickness, interfacial roughness, and chemical distribution. At those nodes, ... Sponsored By:
FEI Company
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A New Method of Wafer-Level Plan-View TEM Sample Preparation by DualBeam
Transmission electron microscopy (TEM) is extremely important for obtaining high-resolution images with high materials contrast. Until now, plan-view TEM samples ... Sponsored By:
FEI Company
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