IFTLE 15 Sematech 3D IC Metrology Workshop
The Sematech IC 3D IC metrology workshop examined the state of non destructive metrology tools for 3D process development.
TSV metrology requirements include measurement of :
- depth
- Top and Bottom CD
- Via Pitch
- Sidewall angle (top and Bottom)
Nanda-tech
Nanda claims their optical inspection tool can be used for more than just identification of surface imperfections. The figure below shows inspection application areas in a number of 3D IC unit operations are possible.
ITRI demonstrated the use and of a spectral reflectometer for high density through-silicon via (TSV) inspection. The non-destructive solution can measure TSV profile diameters as small as 5 um and aspect ratios greater than 13:1. The measurement precision is in the range of 0.02 um. Typical data is compared to a SEM cross section in the fig below.
Albany nano
Pofessor Kong described his studies using X-ray tomography to determine voiding in TSVs.
McDonough of Albany presented Si stress measurements were carried out using far- field micro-Raman spectroscopy. Stress fields associated with isolated TSVs and TSV arrays were both evaluated. While results for calculated and measured were excellent for isolated TSV the TSV arrays were more complex to interpret. Ditto the anneal of stress after processing.
Olympus
Vadim Mashevsky of Olympus showed that infrared laser microscopy techniques allow imaging through bulk silicon for 3D Interconnect metrology.
Applications include:
- Overlay metrology of bonded wafers
- Overlay metrology of front side to back side wafer patterns
- Thickness metrology
- Bonded interface defect detection and defect metrology
Veeco
Novak of Veeco offers the following comments on Infrared illumination based microscopes. They :
– “See” through silicon
– Allows for alignment of stacked wafers
– Poor lateral and vertical resolution due to
– Long wavelength
– High measurement noise
White light confocal systems have:
– Good lateral resolution
– Lower vertical resolution for high aspect ratios
– Slow vertical scans
– Does not “see through silicon”
White light interferometric optical profiler
– Good lateral resolution
– Excellent vertical resolution even at high aspect ratio
– Fast vertical scans
– Mature technology, in production for decades
– Does not “see through silicon”
Below is shown 3 micron via array (vias inverted for clarity) :
Average Depth: 34.63 μm; Average width: 3.4 μm;
There are some Major events coming this fall which are exclusively focused on 3D IC including :
TSV metrology requirements include measurement of :
- depth
- Top and Bottom CD
- Via Pitch
- Sidewall angle (top and Bottom)
Nanda-tech
Nanda claims their optical inspection tool can be used for more than just identification of surface imperfections. The figure below shows inspection application areas in a number of 3D IC unit operations are possible.
IRTI
ITRI demonstrated the use and of a spectral reflectometer for high density through-silicon via (TSV) inspection. The non-destructive solution can measure TSV profile diameters as small as 5 um and aspect ratios greater than 13:1. The measurement precision is in the range of 0.02 um. Typical data is compared to a SEM cross section in the fig below.
Albany nano
Pofessor Kong described his studies using X-ray tomography to determine voiding in TSVs.
X-ray video showing incomplete fill in 5 um TSV are shown below.
Voids can be clearly seen after different annealing conditions without cross sectioning of the TSVs. However the technique is currently limited to small sample sizes.
McDonough of Albany presented Si stress measurements were carried out using far- field micro-Raman spectroscopy. Stress fields associated with isolated TSVs and TSV arrays were both evaluated. While results for calculated and measured were excellent for isolated TSV the TSV arrays were more complex to interpret. Ditto the anneal of stress after processing.
Olympus
Vadim Mashevsky of Olympus showed that infrared laser microscopy techniques allow imaging through bulk silicon for 3D Interconnect metrology.
Applications include:
- Overlay metrology of bonded wafers
- Overlay metrology of front side to back side wafer patterns
- Thickness metrology
- Bonded interface defect detection and defect metrology
Veeco
Novak of Veeco offers the following comments on Infrared illumination based microscopes. They :
– “See” through silicon
– Allows for alignment of stacked wafers
– Poor lateral and vertical resolution due to
– Long wavelength
– High measurement noise
White light confocal systems have:
– Good lateral resolution
– Lower vertical resolution for high aspect ratios
– Slow vertical scans
– Does not “see through silicon”
White light interferometric optical profiler
– Good lateral resolution
– Excellent vertical resolution even at high aspect ratio
– Fast vertical scans
– Mature technology, in production for decades
– Does not “see through silicon”
Below is shown 3 micron via array (vias inverted for clarity) :
Average Depth: 34.63 μm; Average width: 3.4 μm;
Suss
Suss offered the following performance metrics that metrology should seek to determine:
EVG
EVG once again shows us that alignment for Cu-Cu bonding has issues due to CTE / temp.
3D Coming Events:
There are some Major events coming this fall which are exclusively focused on 3D IC including :
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