Archive for '2011'

    Cleaner lines in the new ElectroIQ.com

    December 15, 2011 12:35 PM by ElectroIQ
    Hello again readers! I recently told you about some new functionalities on the ElectroIQ.com website, but that's only part of our redesign work. Looks are important too, and organization even more so.

    Very soon, you'll see a lighter color scheme on ElectroIQ.com. We've pared down the blue and red in favor of a cleaner palette on the site, with a lot of grey and white. Does this matter? Not in the strict sense of will the information you're reading, watching, or listening to be affected, but the new color scheme is here to make it easier for you to consume information from ElectroIQ without distractions.

    Speaking of paring down, we've also eliminated the barrier between "Current Articles" and "Industry News" that appeared throughout the site. Let's say you're visiting the Semiconductors channel page. you'll see all the more recent stories in one column. Are we abandoning industry news stories, or technical articles about process steps? Certainly not. We've decided to group content with the fewest barriers possible so you can find it more easily.

    Another quick note on those channel and topic center pages: We've renamed "Wire News" to "Live News Stream."

    As always, you can email me with questions or suggestions at meredithc@pennwell.com. Keep an eye out for our new look!

    Your digital media editor,
    Meredith Courtemanche

    Reading into INTC's 4Q downdate: HDDs, PCs, and SSDs

    December 13, 2011 3:48 PM by ElectroIQ
    The impact of the Thailand flooding has, as expected, spread throughout the tech supply chain, and now appears to be affecting even chip giant Intel. The company now says its 4Q11 sales will be about -7% below estimates ($13.4B-$14B, vs. $14.2-$15.2B) due to ramifications from the disaster. Gross margins are seen fractionally lower at ~64.5%. (Barclays' CJ Muse notes that $1B in lower sales, paired with $95 ASPs, suggests 10.5M fewer unit shipments -- which he translates to an -11% decline in 4Q11, instead of previous 1.5% expectations.)

    PC sales are still expected to be up sequentially, but inventories are vanishing in the global supply chain as hard-disk drives are increasingly scarce (a big chunk of global HDD production is in the flooding-ravaged areas and has been knocked offline). Intel expects HDD shortages to linger into 1Q12, after which MPU inventories need to be rebuilt through 1H12.

    Analysts' Take

    Given the breadth of the Thai flooding's industrywide impact (from HDDs to chip packaging services ), nobody seems very surprised that INTC is now being affected. Earlier this week IHS iSuppli calculated nearly a 4M unit shortfall in 1Q11 PC shipments as a result of the floods, exacerbating what is already a seasonally slow post-holiday period for PC demand. (The firm says HDD supplies should rebound by 2Q12, though -- and might even achieve oversupply before the year's out.)

    Analysts also seem to be more comfortable with where Intel's numbers are relative to (what they believe is) sentiment among the greater PC sector. (Remember how analysts previously tried to overlay PC weakness onto INTC, to no avail ?) FBR Research's Craig Berger points out that Intel's been "disconnected from the rest of the PC supply chain for at least a couple quarters," but both he and Barclays' Muse agree that Intel's adjusted outlook is now better aligned with end-market demand, from deteriorating ODM build data to PC demand assumptions to pre-flooding PC sales warnings from Dell and HP.

    Muse, Sterne Agee's Vijay Rakesh, and Citi's Glen Yeung await the other shoe to drop for AMD's 4Q11 results (1%-5% expected growth, for now) and 1Q12 outlook (Rakesh is also watching Nvidia.) AMD, though, seems not to be worried about HDD supply issues for now; "In 1Q and 2Q, maybe you see some manifestations," according to new CEO Rory Read , but right now AMD isn't seeing any "major pressure in terms of the quarter."

    Others wonder if the HDD shortage is drawing attention away from bigger problems with end-demand. Credit Suisse's John Pitzer suggests 1H12 demand will also be soft due to Windows 8 "anticipatory pause," ongoing worries about ARM competition, plus continued "macro headwinds and the likelihood of another INTC miss." At least the problems would seem to be cyclical and not structural in nature, with PC growth expected to accelerate again in 2Q/3Q12. FBR's Berger sees other warning signs that could pinch PC margins in 2012 (and perhaps trickle down to INTC and other component suppliers): Chinese labor costs (10%-30% higher in 2011, another 30%-50% in 2012); commodity inflation (e.g. gold, Cu, metal casings); and more competition from tablets (iPad et al, assuming 2.5 tablets cannibalize one PC).

    If HDD supplies are a problem, is this a window of opportunity for solid-state drives (SSD)? Not really, Intel says ; ODMs probably are reevaluating their options as the HDD supply situation evolves, but SSD demand probably won't accelerate until the end of 2012. -- J.M.

    ElectroIQ.com is getting a new look

    December 8, 2011 9:02 PM by ElectroIQ
    You're going to notice some changes around ElectroIQ.com soon, and may have seen some of them already. We'll be adding new coverage areas, streamlining the topics in each of our "Channels," and revamping the site design for a better user experience. We'll talk about all of these changes here in the editors' blog as we transition through the upgrade.

    Our redesign is already underway, as you can see from the new "Translate" functionality on every page. The semiconductor and photovoltaics manufacturing supply chains are global like few other industrial sectors. On top of this, students in the Asia-Pacific, Mexico, Eastern Europe, and other locations are studying engineering. With our parent company, PennWell Corp., the ElectroIQ team hosts and attends tradeshows and conferences from Las Vegas to Shenzhen.

    We wanted a translator that was easy to use and included as many languages as possible, so no surprise that we turned to Google. Whether you're on the electroiq.com homepage, reading a news story, or on any other page, you'll be able to set your preferred language, and we'll keep it that way for the duration of your site visit (unless you decide to switch it up).

    You can use the Google Translate function now (and let us know what you think), and when the new site design goes live in the next few days, you'll see links to our international publications right along the top of the site. Want to read our in-depth technical magazine content in Chinese? It's all right there for you.

    This new design is not a one-day change, and we'll keep you up-to-date on all the new things you'll see come on-line. If you have questions or suggestions, email me at meredithc@pennwell.com .

    Your digital media editor,
    Meredith

    IEDM "app" plots your schedule

    November 30, 2011 10:38 AM by ElectroIQ
    Just after posting our IEDM slideshow sneak-peek , a reader emailed us to point out something he thinks can help this year's IEDM attendees -- and anyone who regularly goes to industry conferences/trade shows. You know the drill: obtain the event schedule and program/abstracts in advance, mark the talks you want to see -- then identify all the conflicts, mourn the tough decisions, lament the papers you'll have to miss, brace for room-room and hall-hall sprints, etc. It's pure "drudgery," Aneesh Nainani tells SST : "Going back and forth between the conference leaflet and the abstract booklet, and then discovering that their [sic] exists an conflict between the papers I wanted to attend and finally loosing [sic] the piece of paper with my schedule on the first day of the conference." Next week's IEDM in Washington DC is a prime example of such conference chaos: three days, 36 sessions, over 200 presentations.

    Fear not, intrepid travelers: Aneesh has devised a free app for iPhones/iPads/iTouch that purposefully targets next week's IEDM: browse the conference schedule, flag papers you want to attend, show where all the session are at a particular time slot, browse papers by category, find the room for the next paper presentation, etc. You can also search across extended abstracts to narrow down to a specific topic (e.g. flash memory) or presenter (e.g. Stanford U.) The app is downloadable for free at the App Store here .


    Aneesh is a Stanford PhD grad (2010), during which time he pursued summer research stints at Leti, IBM, SEMATECH, and AMAT. He's currently a senior device engineer at AMAT. He's also a presenter at this year's IEDM, describing a high-k pMOSFET made with 3% GeSn (Paper #16.6: "GeSn Technology: Extending the Ge Electronics Roadmap" ). -- J.M.

    Early 450mm orders: Tire-kicking or seat-warming?

    November 23, 2011 2:39 PM by ElectroIQ
    As formal efforts to prove 450mm cost-effectiveness get underway, we're starting to see the announcements from tool vendors joining the fray. Neither company is outing its customer(s), but the news has generated some interesting analysis about the state of 450mm progress. German supplier Innolas, for example, says it will deliver a 450mm system for wafer sorting/laser marking to a customer's site in 1H12 for development and fine-tuning. Klaus Jotz, Innolas technical information manager, didn't identify the customer but did confirm that it's a single entity.

    Another announcement, however, has generated much more interest and speculation. Molecular Imprints says it received an order to build a 450mm nanoimprint (J-FIL) litho tool to be ready by 2H12, including a five-year multi-year wafer patterning services contract and an option to buy more such systems. Paul Hofemann, VP of marketing and bizdev, declined to name the customer except to hint that it is a "leading IC manufacturer [...] that has taken a lead role for most of the early 450mm tool procurement for this [G450c] consortium." [Readers can draw their own conclusions.] He also noted the tool will stay in MII's facility to eliminate any delays (e.g. shipping, installation, qualification, training, etc.), which "is consistent with the G450C virtual fab strategy in the early 450mm supply chain," he added. While current contractual commitments are to the one customer, "we had some indications that all members were being consulted during the process," he added.

    Many tool vendors have been tinkering with and showing 450mm versions of their process tools, but the one glaring absence has been in litho. About a month ago, ASML offered its own outlook on 450mm adoption that was several years beyond the G450C plan (prototyping after 2016 and production after 2018); clearly ASML has bigger fish to fry (EUV) and will get to 450mm when it has the incentive (time/money) to do so.

    Not content to wait, the 450mm players need to get some 450mm wafers patterned now to start their work -- so they're turning to nanoimprint. "Having early access to patterned wafers is in the critical path of 450mm transition and this tactic will shave many months of the schedule," explained MII's Hofemann. He also added that the process was "competitive."

    MII and nanoimprint proponents doubtlessly view this as Center Stage to prove the technology's viability for next-gen litho use. In reality, though, analysts argue this is just a way to get 450mm work started, keeping the litho seat warm until ASML can come into the fold with an EUV and/or immersion platform. "Realistically the semis guys needed some way to get a reasonable pattern on a 450 wafer so that they can start looking at things like etch and dep uniformity," thinks Gartner VP/analyst Bob Johnson. Fellow Gartner VP/analyst Dean Freeman noted that nanoimprint's pricetag, compared with tens-of-millions immersion or EUV tools, makes it practically a "disposable" option. On the other hand, it's not the first alternative 450mm litho tool being trotted out; EV Group has printed some 450mm wafers too . Freeman added that we've seen this before at the 300mm transition, where some smaller companies stepped up for some early unique-tool work, but "faded to the background as the larger companies stepped in with products."

    So on the one hand, the MII 450mm order does open a door to show nanoimprint can prove itself in a smaller-scale leading-edge environment, which could pave the way for some future business. "MII has a one-two year window of opportunity to demonstrate that they deserve a place in future semi manufacturing before the ASML juggernaut pushes them aside," Johnson says. But it's more likely just a quick fix to get some wafers running to see what other process tools can do, while keeping the seat warm until more heavily-adopted litho tools (i.e. ASML) can get ready. And MII isn't alone here, either; Freeman notes Oxford Instruments has a 450mm etch system but likely won't displace Lam or TEL. And Freeman pointed out that nanoimprint still has its own mask-set hurdles, e.g. 1X mask at 10-20nm and associated alignment challenges. "If it was a better solution we likely would have seen more shipments at 300mm," he points out.

    Another interesting note is that both these 450mm tool announcements are to single customers with singular ownership. There likely is a gentleman's agreement among 450mm consortium participants about how tools can be shared, at least at the beginning, Freeman explained. "At this time it is difficult to say if this will be an exclusive club or anyone with a piece of 450mm gear will be able to participate and get the tires kicked on their equipment," he said. These two recent tool announcements going to individual customers, though, suggests that at least starting out, individual companies have the option to be responsible for their own wafer set for process development. If so they could very well stick with tool vendors that are particular to their own process flow, meaning the 450mm pilot line could end up being a smattering of equipment from different companies, he notes. Don't be surprised if much of the early 450mm work doesn't happen at Albany CNSE's new Nanofab X now being built, as the chipmakers keep any special configurations to themselves. "As the 450GC develops and we see how the companies play with each other we may see some surprising developments happen," he suggests. -- J.M.

    AMAT 3Q11 preview: Trough over, incline ahead

    November 14, 2011 3:51 PM by ElectroIQ
    Analysts give their expectations about Applied Materials' fiscal 4Q11 results, due out Nov.16 -- viewed as bellwether for the chip equipment industry as a whole, and more recently related ones e.g. solar and display manufacturing.

    Industry watchers on average are generally looking for (overall): $2.16B revenues (-25% Y/Y) and $0.20-$0.21 EPS (-42%); that EPS prediction has sunk from $0.33 three months ago. FY11 revenue expectations are $10.53B, up 10%. AMAT's original guidance issued Aug. 24 was for a -15% to -30% decline in sales (i.e. $1.67B-$2.03B) and EPS $0.16-$0.24.

    What the numbers should show, argues Barclays' CJ Muse (4Q11 revenues/EPS/orders: $2.20B/$0.20/$1.70B), is something entirely expected: that semiconductor equipment demand hit bottom this fall (July-Sept), and has been picking up toward the end of the year thanks to the chip-triumvirate of TSMC, Samsung, and Intel. And signs might indicate order growth momentum will carry right through 1H12. He notes, though, that an improving semiconductor business is offset by likely declines in both display and solar.

    Part of the boost in AMAT's SSG (chip) business will come a full quarter inclusion of numbers from the Varian Semi. Equip. Assoc. business which it finally closed on Nov.10, and in which there is a pickup in business, Muse writes. (Most of VSEA's numbers will initially be embedded in the SSG group, he notes.) For AMAT's January 2012 quarter (fiscal 1Q12) he's more optimistic than he was a few weeks ago: $2.15B in sales (vs. $1.90B) and $0.19 EMS (vs. $0.16), with overall orders up 20% and VSEA-aided SSG up 35% (flat in solar and services, +20% in displays).

    Credit Suisse's Satya Kumar (4Q11 revenues/EPS/orders: $2.13B/$0.20/$1.70B) warns that AMAT's competitors are enjoying an upswing too, and warns of "stagnant/declining" marketshare in WFE vs. KLA-Tencor, Lam Research, and ASML. He invokes Gartner data showing a steadily AMAT marketshare decline: 21% to 17+% from 2004-2010, and in 2011 down another 18% Y/Y in its core semi business while macro WFE has actually risen 5%. TSMC's filings indicate less AMAT business at that key account, too (25% in 2005 to 15% in 2011). Why? AMAT's market dominance, he explains, is in product areas (e.g. deposition) "that have not benefited as much from the increase in capital intensity," e.g. litho and inspection.

    Aside from semiconductor manufacturing, Kumar also lays down some bets on AMAT's other businesses; 25% of AMAT's sales in the current calendar year are from solar and displays, but he sees this withering by half over the next 12 months. He sees display spending -17% in 2011 and "at similar levels next year," though AMAT could get a 10% uplift in display tool sales as OLED and high-resolution LCDs move to larger panel sizes where AMAT's share is more prominent -- LG, for example, is planning Gen-8 OLED production by mid-2012 and Samsung is budgeting 7T won (US $6.2B) for OLED in 2012.

    One area of softness continues to be solar. Kumar points to persistent oversupply and weak demand as a bad combination for pricing and margins (more like negative margins for many suppliers), which has resulted in "a virtual standstill in capacity expansion," Kumar writes. He's modeling a punishing -73% dropoff in AMAT's EES (solar biz) 3Q sales, though he expresses doubt that AMAT will aggressively cut costs in this unit -- since any profits from the semi side of the biz can be used to "subsidize" EES costs (pun likely intended).

    Like Muse, Kumar sees a 20% bump in Jan. quarter (F4Q11) orders, and a 70-100bps bump in AMAT's gross margins thanks to VSEA's higher margin profile and possibly lowering AMAT's tax rate. For 2012, he is a tad more bearish, though: $9.1B revenues and $0.82 EPS. -- J.M.

    Deca lands a 1-2 WLCSP punch -- and you won't see it coming

    November 9, 2011 12:36 PM by ElectroIQ
    Amid the elegance of T.J. Rodgers' (Cypress Semiconductor president & CEO) home and winery in Woodside, CA, a new company -- Deca Technologies -- was announced to the media . The company's 67 employees plan to transform the interconnect space by wielding a disruptive cost structure (left jab!) and lightning speed of execution (right hook!) to do new product introductions in minutes rather than days or weeks. The combination of speed, low cost, and flexibility tackles the problem of packaging costs that haven't come down commensurate with Moore's Law scaling progress.

    Deca's first product is a series of WLCSP "derivatives" (see table below). The initial TAM for fan-in WLCSP is $2B by 2016 (a CAGR of 14.7% between 2010-2016) noted Deca's president & CEO, Tim Olson, citing data from Yole. Also invoked was Jan Vardaman's (president and founder of TechSearch International) projection that with respect to Deca's initial product offering, "WLPs will maintain double-digit unit growth with a CAGR of 12.5% and annual volumes exceeding 20 billion units by 2014."


    Deca says it can go from design to manufacturing in under 60 minutes. And with respect to total manufacturing cycle time, by late 2012 or early 2013 Deca expects to have a three-day cycle time for wafers going through its autoline factory. In comparison, Olson said that the current Tier-1 SATS average about 17 days of manufacturing cycle time. Currently, six customers are engaged (five of the six are $1B+) with one customer already qualified for production. Three more customers are in the process of qualification, and the company expects the remaining two customers to begin qualification within 90 days. More customers are expected to sign on in 1Q12.

    Don't expect any fab tours or boasting from equipment suppliers about what they just sold to Deca, however. With the financial roots of the company in Silicon Valley (Cypress Semiconductor invested $35M) -- an area that made paranoia a virtue -- Olson, said that two-thirds of the company's equipment wouldn't even be known or familiar to semiconductor manufacturers, or even found anywhere else in the world. Additionally, the equipment that is used is very low-cost, nowhere near approaching the high pricetags normally associated with fab equipment. The production line itself is set up along kanban principles based on SunPower's experience.

    Most of the equipment has been customized/modified by Deca; unlike semiconductor fab equipment, Deca does not use batch-based equipment. And though no one external to the company -- not even customers -- are allowed inside the fab (located inside SunPower's fab in the Philippines), if you could go in, all the equipment is the same color; there are no name plates. You would be unable to figure out who made anything, said Olson. (Perhaps the moral of this story: if you can go from a design to manufacturing in under 60 minutes, you can rewrite the rules of engagement with customers and they will love it.) The company has either indefinite or multi-year exclusivity agreements with equipment suppliers. There are also strict terms that prevent equipment suppliers from the sale of the same or similar equipment. Olson also credited Cypress' equipment specification/procurement/qualification process as being a major factor in its success to date. The only equipment factoid Olson did acknowledge was that conventional lithography technology is not being used.

    Further "cloaking" is achieved because the company is paranoid even with third parties who have NDAs; line access is highly restricted, and there is extreme sensitivity with respect to the company's trade secrets, said Olson. The only customer Deca is willing to divulge publicly is Cypress Semiconductor, but Olson said the company has contracts with several major high-volume manufacturers (they didn't go after the little guys, he noted). And though SunPower invested an undisclosed amount of capital in Deca, and gave Deca half of SunPower's fab space (Laguna Technopark, Philippines) to use, as well as human resources, and process/operational know-how (Deca has exclusive access to SunPower's IP in its domain) -- it is not a customer. (It wouldn't need to be, of course, because SunPower taught Deca what it knows about extremely fast HVM.) One of the contributing factors that brought the companies together was the realization that almost all of the back-end-of-line processes used by SunPower for its solar cell map are 1:1 with those used by Deca for its 4-series WLCSP (2× and ball drop) product: patterned polymer, cure, PVD seed, plating template, electroplate, and strip/etch/clean.

    To its credit, Deca took another page from SunPower's playbook: it hires degreed engineers to run the fab equipment. The fact that these are operators who want solid engineering careers and not people who might drift from one company to another is seen as an asset, which further adds protection to the company's IP. Having engineers run things and not allowing equipment suppliers' field personnel to work on equipment prevents "leaks" in IP and process know-how, Rodgers added.

    [Here's some more "back story" about the company: Part of the launch event was a tour of T.J. Rodgers' winery conducted by Rodgers himself. He designed some of the equipment used in his winemaking process -- metering techniques, piping, and such (some of his inventions for winemaking are patented). When Deca was designing its fab, he contributed some of what he learned from being a vintner to the fab design.]

    When asked about the possibility that other packaging suppliers and foundries could copy Deca's strategy and model, Rodgers said that it would require a paradigm shift from the "fab mentality" -- i.e., batch-based equipment with high pricetags. He pointed out that, to date, no one has been able to copy SunPower's manufacturing approach. Even if competitors could figure out the kind of equipment and modifications needed to copy the methodology, Rodgers said Deca has too great a lead. "Getting a lead and being able to sustain it is huge," he said.

    (posted by Debra Vogler, senior technical editor)

    3D IC needed? Making a case for 2.5D with Xilinx FPGA launch

    October 27, 2011 10:33 AM by ElectroIQ
    During a product launch event in October 2011 for the Xilinx Virtex-7 2000T field programmable gate array (FPGA), a programmable logic device with 6.8 billion transistors, Liam Madden, corporate vice president of FPGA Development and Silicon Technology, spoke about the value of so-called "2.5D packaging." Xilinx connects several die to a silicon interposer to enable this FPGA.

    The semiconductor packaging industry used to see 2.5 as stepping stone, Madden said. However, while 3D packaging is coming, there are restraints in real active-on-active die stacking: keepout zones, thermal hot spots, etc.

    2.5D packaging gets disparate chips to communicate as if they are on one piece of silicon -- a real advance that many more companies are taking advantage of instead of or before a move to 3D, Madden said. He also points out that 2.5 will teach us a lot about 3D ICs.

    See the device architecture details on the Xilinx Virtex-7 2000T FPGA here.

    -- Meredith Courtemanche

    US solar vs. China: Win to lose?

    October 24, 2011 2:43 PM by ElectroIQ
    Taking full advantage of last week's Solar Power International spotlight, seven US-based c-Si solar panel manufacturers dubbed the "Coalition for American Solar Manufacturing" (CASM) said they are filing petitions with the US Department of Commerce and the International Trade Commission, alleging that Chinese rivals are "dumping" products into the market and are receiving "massive illegal subsidies" from their government. Any formal Commerce/ITC investigations could begin in November, with preliminary determinations coming by year's end or early 2012.

    Reaction to the trade dispute has been immediate and reflects the complexity involved in such a dispute. On the one hand are US solar manufacturers who feel squarely in the crosshairs and want "significant duties" imposed (up to 100%) to level the playing field. (Also in their corner are local politicians, including Ed Markey/D-Mass who decried a "Manchurian manipulation .") In between are the materials and manufacturing equipment suppliers who have customers (and locations) on both sides. China, naturally, isn't taking the accusations lying down: Yingli , Suntech , and China's Ministry of Commerce [edit 10/27: plus Suntech, Trina and Jinko ] have all spoken out publicly against the accusations and potential ramifications. (Firing back , the CASM calls Chinese accusations of US solar protectionism "absurd" coming from what it calls the planet's worst trade law violator: "China has for years been engaging in economic protectionism and a quiet economic war affecting all of its trading partners," the group states. And SolarWorld's president Kevin Kilkelly pointed to the recent Jinko Solar chemical pollution controversy as an example of allowed lack of transparency.)

    What seems clear is that most of the industry is treading very carefully on the subject. Besides SolarWorld, the other six coalition members are keeping anonymous (as they are legally entitled to do in the US), likely fearful of ramifications in the high-growth China market. Equipment suppliers are understandably noncommittal; one told us merely that it wants to see "all of our customers around the world drive down the cost of solar electricity." The SEIA agrees that the US can compete given an even playing field -- though a SEIA report earlier this summer calculated the US as a $2B net exporter of solar products.

    And note that this complaint is focused on c-Si only, and does not involve thin-film -- where US firm First Solar continues to set the benchmark for the supreme solar PV metric of cost/W manufacturing ($0.75/W). "What we believe in is free and open market access here and everywhere else in the world," FSLR's top exec Rob Gillette was quoted as saying at SPI. Not exactly taking up arms for the cause of US brethren.

    The real issue is whether such action is in fact divisive and destructive to solar energy overall. A trio of solar executives speaking at last week's SPI event appeared skeptical that the move would do anything but disrupt and perhaps derail the US' anticipated strong solar growth over the next few years. Plunging module prices has been a key driver in lowering costs for installations, which spurs end-demand and creates jobs. Artificially raising prices by implementing tariffs could easily unravel end-market progress. "If module prices go up, installations are likely to suffer," notes Lux Research Aditya Ranade. And imposing tariffs on Chinese solar products may not even solve the problem, as Chinese firms may just seek lower-cost production elsewhere e.g. other Asian nations or Europe, agrees Paula Mints from Navigant Consulting. "Even if there were sanctions against manufacturers in China in the US, there is not enough manufacturing capacity (technology) to take up the slack in demand," she says.

    The New York Times draws several parallels to three decades ago when the enemy was Japanese auto imports; ultimately those foreign companies created assembly lines and jobs here in the US, yet domestic automakers still struggle to compete against Japan. Creating division within the industry might achieve short-term sectorial success for some, but distracts everyone from the real prize: getting all of solar on a level playing field vs. other energy sources, both conventional and other renewables. -- J.M.

    A sad day

    October 5, 2011 11:20 PM by ElectroIQ
    Even if you never met the man personally, you most certainly have benefitted from the inventions that Steve Jobs ushered into existence. The legacy that he leaves is one that lifts up the human spirit. Whether it's beginning artists, singers, musicians, and filmmakers who are able to create art using affordable equipment, or science researchers and doctors able to expedite their work to save lives, there are few people left untouched by Steve Jobs' vision.

    Our sincere condolences to his family, friends, and colleagues at Apple.
    (DV)

    Congratulations to Nobel Prize winner Prof. Daniel Shechtman

    October 5, 2011 10:53 PM by ElectroIQ
    I couldn't let pass the notice of Prof. Daniel Shechtman (Technion) winning the Nobel Prize in Chemistry. I had the privilege of meeting Dr. Shechtman when I arranged for him to give a lecture at Watkins-Johnson Semiconductor Equipment Group (8/4/97 and 8/8/97 - I still have the flyers!!), when I was Quality Systems Director at the company. I was fascinated by the topic and through my manager at the time, CTO, Dr. Avi Katz, who knew Dr. Shechtman, the invitation was extended for our Distinguished Lecturers' series.

    I was also delighted that he allowed us to use the diffraction pattern of a quasicrystal (which he provided) for the opening segment of an image video I was creating along with James Banks (videographer and gifted animator) at that time. The video was shown at SEMICON Japan in the WJ booth and that opening segment with the diffraction pattern was perfect - crystallographers, materials scientists, and physicists, chemists, and the like, who saw the video would know what it was. Everyone else just thought it was beautiful.

    I know there are quite a few fellow ex-WJ'ers in our Solid State Technology audience. Perhaps some of you remember that lecture by Dr. Shechtman. Please let us know your thoughts.

    (Debra Vogler)

    SEMI High Tech U. event takes place 10/4-10/6/11

    October 5, 2011 2:52 PM by ElectroIQ
    SEMI's SEMI Foundation in association with KLA-Tencor, Advantest, and Nikon, are conducting a special SEMI High Tech University event for high school students running 10/4-10/6/11. During the event, studends will attend classes taught by volunteer industry professionals at the campuses of KLA-Tencor and San Jose State University. (DV)

    The first 450mm clubhouse

    September 28, 2011 7:17 AM by ElectroIQ
    The long-discussed and controversial 450mm wafer-size transition got a significant reality check with five of the biggest global chipmakers putting their skin in the game. 450mm's Original Three (Intel, Samsung, and TSMC), now joined by IBM and GlobalFoundries creating a "Global 450 Consortium" , say they will spend $4.4B over the next five years for two chipmaking development projects spanning several sites in New York State. A big chunk of that will go toward proving out 450mm manufacturing work, that ultimately "may facilitate the possibility of building a 450mm plant in New York state" (note the double-noncommittal). The rest of the money will go toward 20nm/14nnm development work for IBM and partners.

    This story is still taking shape, and we're still talking with sources to fill out the entire picture, but here's what we know so far (and we'll keep updating as we learn more):

    -- Who's doing what? No details were provided about how the $4.4B is being split up: 1) between the 450mm work and IBM et al.'s 20nm/14nm development, or 2) among individual 450mm participants. All of the stated destinations in NY State for the investments are facilities owned by CNSE (Albany Nanotech, Canandaigua), IBM (Yorktown Heights and East Fishkill), or SUNY (Utica). CNSE will get $400M from the state over five years, including $100M for "energy efficiency and low-cost energy allowance."

    Slides from CNSE execs over the past few months show a new "Nanofab" complex (dubbed "X" or "West") on the drawing board, with proposed 450K sq. ft. footprint including 45K sq. ft for cleanrooms. That's almost twice the size of CNSE's two major sites across the street: two-year-old Nanofab East, and six-year-old Nanofab North (home to CNSE's EUV alpha tool). This could be where the 450mm work takes place; we'll be talking with CNSE tomorrow (Weds. 9/28) for more information.

    That $4.4B won't answer every 450mm production question, but equipment will be installed and "everyone will get to kick the tires, work on how to improve productivity, and jointly develop what the 450mm equipment should look like," explained Gartner research VP Dean Freeman. "It might be enough for the initial C&F to be done and prove out some of the economics." Specific goals will be to "learn things about how to boost plasma densities, improve wafer thickness uniformity, and improve system throughput of the area based equipment," he noted.

    -- What about existing 450mm pilot-line efforts? Earlier this year, TSMC's Morris Chang
    was very clear about the foundry's 450mm plans : a pilot line at Fab 12 Phase VI starting with 20nm process technology, timed around 2013/2014, and a production line following around 2015/2016, a TSMC spokesperson reiterated that timeline to SST (adding that the production line would be in Fab 15). It is still unclear whether TSMC would continue to pursue its own in-house 450mm pilot line at the same time as this new group in New York. [Update 9/29: T hat same TSMC spokesperson pointed out that the Albany 450mm line will be consortium-run and is not considered a TSMC line, but said "maybe the timing will coincide with each other, or be very close."] Also note that Intel says it will make this its "450mm East Coast Headquarters," a qualification that implies a future West Coast operation too. The company's D1X fab on the West Coast, which was said to be built with 450mm in mind , probably will be for final work, not initial pilot-line stuff.

    That said, more than likely this 450mm pilot line will go the way all such technology partnerships go: frenemies working together precompetitively, then taking the technologies back home to tinker for their own production. "While Intel will have folks on the East Coast, you can bet when the time comes you will see D1X with some 450mm equipment," said Freeman. Expect the same for TSMC, Samsung, and apparently GlobalFoundries and even IBM.

    -- Who's missing? Note the "Global 450 Consortium" is comprised of private funds, and makes no mention of actual industry "consortia." IMEC's 300mm cleanroom
    was upgraded to be "450mm-ready " -- if this new 450mm thrust is chipmaker-only, where does that leave IMEC's efforts? "Companies that are not invited to the consortia party, will need to find a place to do the 450mm development work; that place will likely be IMEC," noted Freeman. The EU seeing 450mm as a possible route to become competitive in the semiconductor industry again, and "there is a lot of advanced transistor work that needs to take place," he added.

    [Updated 9/29: ] SEMATECH/ISMI had been ramping its own early-work 450mm program, and
    this year ISMI received approval for NY state funding for 450mm development at Albany CNSE. At this summer's SEMICON West it said 10 tools were either installed or on order, and that "pilot line evaluations show 'low risk.'" Some 450mm equipment already in place at Albany CNSE are tools for lot sorting, wet cleans (a SSEC 3400 tool directly in front of the NanoFab North cleanroom viewing hallway), bare wafer defect detection, wafer edge inspection, and FOUP washing. "Our program is now a part of the new initiative, which will build on and expand our efforts," a SEMATECH spokesperson said, but noted that the actual location of 450mm tools hasn't been determined.

    The aforementioned production gains from 450mm also would be very attractive given the relentless cost pressures and volumes required in DRAM. Freeman expressed surprise "that Toshiba is not yet a part of this" 450mm consortium. (Also not mentioned: Hynix or Elpida/Rexchip.)

    -- What's the 450mm timeline now? 450mm has been an industry hot-button topic for years, with progress slowly picking up momentum: SEMI's already done most of the standards work, and many equipment makers are finally coming out with "450mm tools" (some simple retrofits, some far more complicated), including pledges of millions of dollars for 450mm tool development much of which could be for continued feasibility studies. Originally the Intel/TSMC/Samsung triumverate
    wanted a 450mm pilot line by 2012 , but almost certainly that won't happen now, and this new consortium's five-year pledge suggests as much, and even TSMC's proposed timeline looks a bit optimistic at this point. Gartner research VP Bob Johnson predicts prototype process tools might be installed sometime in 2012, with functional processes two years after that and an official pilot line in ~2015, then another two years for "the first real production" on 450mm wafers in 2017-2019.

    The problems for 450mm remain twofold:
    uncertain returns and competing priorities . Chipmakers believe that 450mm wafer manufacturing is their next big stepdown cost reduction (~30%). Equipment makers bellyached about 450mm, remembering their extended and not-so-profitable 200mm-to-300mm transition (and they're hesitant to now spend lots of R&D for a technology that will basically shrink their own market by 30%), but lately they have been more publicly supportive of it. An actual 450 pilot line, with tools configured in a manufacturing environment and producing patterned 450mm wafers, will go a long way toward getting everyone on the same page about what to expect.

    But the industry arguably has other important technology concerns besides the economics-based 450mm transition. Leading-edge chipmakers have managed to keep extending optical lithography with immersion, multiple patterning, etc., but the next year or two likely will see the (attempted) introduction of EUV litho into manufacturing, and possibly other next-gen litho technologies, mixed as-needed with other flavors of optical litho. And note that a 2015 450mm pilot line coincides with what is expected to be the 10nm node at leading edge, and 2017-2019 could be 7nm or even 5nm. How many more nodes will conventional silicon continue to be viable, necessitating any of a range of alternatives, from known materials to exotic ones (e.g. graphene or nanotubes)? -- J.M.

    Update from Asia: Six key trends in semiconductor demand and capex

    September 23, 2011 3:52 PM by ElectroIQ
    Barclays analyst CJ Muse summarizes recent visits across Asia's IT supply chain. Among his list of key themes: End-markets are still soft but stabilizing; capex is stabilizing too, with help from foundries and NAND; LCDs and LEDs are still in the doldrums; and an early Black Friday tipoff.

    Semiconductor end-markets stabilizing: Semiconductor end-market trends remain still positive for emerging markets (e.g. BRIC, particularly China/Brazil/Russia), offsetting persistent weakness in the US and Europe. This trend holds for PC demand as well. "Longer-term, it is clearly difficult to get excited about the category (as corporate refresh appears to be peaking), but near-term we do see stabilization as a positive," Muse writes.

    Outside of traditional computing platforms, Apple is driving strength in smartphones and tablets in all regions; competitors' buzz is "much more subdued, suggesting expectations have become more realistic and appropriate." ODMs also see potential in Intel's new category of "ultrabooks" ; ODMs would prefer to stick with Intel x86 over ARM for these devices citing reliability, but the ASP difference might become a factor, he says.

    Overall, Muse maintains his outlook for 4% growth in semiconductors in 2011, and 7%-8% in 2012.

    Capex bottom in 4Q11: Signs are mixed for semiconductor manufacturing capital spending, Muse says. "Chipmakers are clearly hesitant to add new capacity" given the current environment. However, NAND is still comparably strong (tracking flattish), foundry will be spending to 28nm (see next point below), and overall capital intensity is increasing due to complexity of node shrinks. Citing Samsung timing and demand uncertainty, Muse sees orders remaining "muted" through 4Q11 -- but look for signs of life in early 2012 starting with foundries and NAND, offsetting a possible cut in Intel's spending . "We do have high conviction of an order recovery in the next two quarters," Muse writes, projecting $29B-$30B in wafer-fab equipment spending in 2011, followed by $27B-$29B in 2012.

    Foundries stepping up at 32/28nm: Foundries have yanked back their spending in 2H11 as they still digest inventory through 3Q11 (longer than expected) and visibility is limited, but at least 4Q11 internal forecasts, which were conservative, haven't been changed so things apparently aren't seen getting any worse. But foundries should start spending again soon if only to keep up with their customers' 32nm/28nm roadmap requirements. Muse points to a 50% increased capital intensity for 28nm vs. 40nm, with cost per 1K of capacity rising from $60M at 40nm to $100M at 32/28nm. Don't mistake, spending will still decline, but "only modestly," maybe 5%-10%, Muse says.

    Look for spending driven by Taiwan foundries (TSMC adding ~45k capacity/~$4.5B capex for 28nm alone, plus up to $1.5B for 40nm/maintenance), plus Samsung LSI (keeping Apple's A5 and A6 business), GlobalFoundries (ramping Malta fab), and UMC (still in the $1B club). Total projected 2012 spending for those four would be -7%, "significantly better than much more bearish views," he points out.

    Memory firms cutting out: DRAM prices have been plunging for a long time now, but seem to have bottomed out in recent weeks. Meanwhile, DRAM makers have been busy, taking as much as ~12% of their capacity offline, Muse notes. That encompasses production cuts in Taiwan and Japan (Muse calculates 50K /WSPM at Powerchip, 30K WSPM at Rexchip, 50K at Nanya/Inotera, and 30K-40K at Elpida) plus conversion to specialty DRAM by Korean memory firms. However, as PC end-market data points show stabilization, and supplies respond to the production cuts (should take a month or so), "we are near-term bullish on the DRAM cycle," Muse writes.

    NAND suppliers, meanwhile, are better than their DRAM brethren, enjoying demand driven by smartphones/tablets and (building, eventually) demand for solid-state drives. Apple is on pace to soak up around 30% of the entire NAND flash market in 2011, he notes. Meanwhile, firms are rapidly approaching more complex sub-2Xnm node manufacturing. Overall look for slowing bit growth (Hynix sees 80% in 2011 and 2012, Samsung sees mid-70% and 70% in 2012).

    Weak LCDs, and a Black Friday tip: LCD demand is weak too, with utilization rates hovering around 80%, and panel prices are seen down in August and September; shipments are tracking in the low-single digit growth, not enough to stave off inventory buildups. Assuming 4Q11 is below seasonal norms, utilization rates probably won't improve. On the supply side, capex cutbacks and capacity pushouts (e.g. China) suggests a wait-and-see approach heading into early 2012.

    How desperate are LCD suppliers to stimulate demand? As a "Black Friday" preview nugget, Muse says he heard about 32" LCD TVs being priced as low as $99 -- well below the $120 panel price.

    No help for LED drought: LED firms are feeling very uneasy, too -- sentiment from "a handful of LED players" was "decidedly negative," Muse reports. Component pricing is tracking down in the high single digits for both 3Q11 and 4Q11, and factory utilization has sunk to 50% and even lower. Many suppliers indicate no new MOCVD capacity in 2012; one vendor told Muse that Chinese vendors are selling excess equipment into the used market. "We just don't see a recovery here anytime soon, and [...] 2012 demand could prove to be extremely low," he writes. -- J.M.

    What the IMF's new GDP forecasts mean for semis

    September 20, 2011 12:56 PM by ElectroIQ
    Today the International Monetary Fund decided the entire planet's economic recovery is slower than thought, particularly in developed regions, so it's trimmed (and in some cases slashed) its GDP outlooks for both 2011 and 2012.

    "The global economy is in a dangerous new phase. Global activity has weakened and become more uneven, confidence has fallen sharply recently, and downside risks are growing," said the IMF said in its just-updated 2011 World Economic Outlook (WEO).

    Overall global GDP is still seen at 4.0% in both years, but there's a gulf between the "Advanced" and "Emerging" economies. The IMF sees just 1.6% growth this year for the former, vs. 6.4% for the latter. In 2012 it's not much different, 1.9% vs. 6.1%. And within those anemic numbers are dark clouds for the US economic picture. Back in June the IMF saw 2.5% growth in 2011 and rising to 2.7% in 2012 -- now it's slashed those outlooks to just 1.6% and 1.9%. Other nations in this category (e.g. Euro, UK, Canada) have their two-year GDP outlooks lowered by up to half a point.

    The new GDP projections also depend on a number of optimistic assumptions: that the EU debt crisis can be contained, that US fiscal turmoil can be quelled, and global financial market volatility smooths out. Government stimulus programs have to give way to private demand, and regions with heavy imports or exports need to balance themselves out. "If the assumptions are not met, global growth will be much lower," the IMF warns.


    For the semiconductor industry, the revised IMF GDP forecasts are another dash of cold water on hopes of even a mild a bounceback in 2012. Last week Gartner kicked off the downgrade party by sinking its 2011 semiconductor forecast into the red , with a worst-case scenario of consecutive 2011-2012 declines (-2.2% and -4.9%) if global economies sputter.

    Just days ago at his annual fall forecast presentation, IC Insights' Bill McClean cited a number of global GDP assumptions underpinning his forecasts for 2011 and 2012 (and beyond). Responding to the new IMF numbers, he agrees that if Europe's credit upheaval can be resolved "in a good way, our forecasts could still hold," though he admits there's "more downside than upside potential." If Europe's problems persist or widen, "a flat or negative semi market could be in store for this year and next."

    McClean's GDP numbers are based on the World Bank, which he says calculates GDP in local currency divided by the previous year; the IMF uses a "purchasing power parity" method to adjust for seasonality differences and currency valuations. (The World Bank told SST it has nothing new to compare to the IMF's new GDP numbers.) As a result, he says the IMF numbers are about 10% higher -- so the IMF's new ~4.0% global GDP for 2011 would be more like 3.6% (McClean has 3.8% in his most recent global GDP assumption). But even so, the IMF update casts a pall over what might happen in 2012: that same discount would convert the IMF's new 1.9% US GDP for 2012 to 1.7% for McClean, vs. his current 2.8% assumption, and total developed from 1.9% (IMF) to 1.7% (vs. his 2.2%). -- J.M.

    Key takeaways from IDF: Ultrabooks and phones

    September 16, 2011 4:41 PM by ElectroIQ
    The big theme of this year's Intel Developer Forum (IDF) was about mobile technology, now and coming in the near future. Barclays' CJ Muse wraps up his key takeaways.

    Ultrabooks. Intel wants to have a ~$1000 ultrabook on shelves in time for the 2011 holiday season, but desired features such as "all-day battery life, instant on, and touch capability" won't be incorporated until arrival of new architectures Ivy Bridge (2012) and Haswell (2013). Neither specifics nor benchmarks were disclosed at this year's IDF, Muse notes, but the company did show some ultrabook variations based on Sandy Bridge chips, and even some Haswell prototypes. Anything on shelves this season would be based on the 32nm Sandy Bridge chips.

    Intel sees its Atom SoC "in line with mainstream products" by the 14nm node in 2014. Many discount Intel in the mobile space as playing major catch-up with ARM-based technology, but Muse notes that by the 14nm node Intel will have a two-year design cycle advantage vs. other foundries. Intel has a roadmap for a low-power SoC with the Haswell architecture, which is said to offer 20× reduced standby power and be more than 50% more power efficient than today's laptops (~15W vs. 35W).

    What's different now vs. Intel's previous attempt to push its with "consumer ultralow-voltage" (CULV) processors ? Muse says this time the message is not just ultrathin formfactor and low cost, but also offering at least or better performance than laptops. New features would include fast-start (5sec out of hibernation), a "smart connect" ability to quickly un-sleep to check for updates, and antitheft from McAfee.

    One big roadblock in the road to Ultrabooks is cost -- specifically, getting supply-chain partners on board to keep their own costs low, while also designing in the features people want (e.g. sensors, touch) and what the product would require (solid nonplastic chassis, different battery, thinner speakers, low-profile keyboard, SSD drive). Intel is mapping a 40% penetration rate by end of 2012, but Muse "perhaps 20% is more realistic."

    Android phone chips. A deal with Google to develop chips for Android-based phones is seen as "a step in the right direction," after a failed partnership with Nokia to develop the MeeGo platform (now relegated to niche use in markets e.g. auto). "Android is the leading OS in terms of units and we see endorsement of Intel's roadmap as key to winning sockets," Muse writes. Intel plans to release a phone sometime in 1H12.

    22nm and capex. Intel's IDF is typically more about the chip architecture technology, but Muse offered some thoughts about recent reports that Intel might be tweaking its 22nm ramp-up . "Our checks do confirm that Fab 24 [in Leixlip, Ireland] has been removed from the 22nm roadmap and that Intel has also begun to incrementally cut tool orders here in 2H11," he writes. If the current market softness persists, Intel will pull back on 32nm utilization and switch to 22nm -- not a surprise, Muse says, since by far most of Intel's capacity (80%-90%) is still earmarked for PCs. Muse sees Intel's 2011 capex at about $9B, and lowering to $7B or $8B in 2012. -- J.M.

    Gartner's revised industry forecast not for the faint of heart!

    September 14, 2011 6:44 PM by ElectroIQ
    Another perfect storm is hitting the semiconductor industry in 2011 and its impact will be felt well into 2012. Jim Walker, VP, Research of Semiconductor Manufacturing and Emerging Technologies, at Gartner, gave a sobering forecast at the MEPTEC lunch forum (9/14/11, Santa Clara, CA). Inventory correction, foundry and DRAM overcapacity, and macroeconomic trends are hitting the industry. All the bad news has resulted in a significant slow down in the supply chain.

    Gartner's revised forecast indicates that most likely, the semiconductor revenue growth for 2011 will be -0.1%; in 2012, the growth is projected to be 4.6%. The risk in the 2011/2012 forecast is if the economy takes a turn for the worse. The worst case forecast is -2.2% for 2011 and -4.9% for 2012. It is projected that 2013 will see a rebound as ASPs recover.

    As an example of inventory correction, Walker noted that the industry saw no growth as a result of the "back to school" selling cycle and there is a reduced holiday build. Therefore, semiconductor companies' guidance for 3Q11 is well below the seasonal norm. Consumer confidence is at a 30-year low and Global Insights has said that the odds of a double-dip recession have risen from 25% to 40% in one month, said Walker. The DRAM sector has also been hit hard by reduced PC demand.

    It would not be hyperbole to say that Walker's observations that ~85% of 2012 semiconductor growth will come from just three applications (tablets, smart phones, and SSDs) caused audible gasps from the audience. As Walker notes in a podcast interview (watch www.electroiq.com or my author page, http://www.electroiq.com/authors/vogler.html) for the podcast, to be posted soon) with SST, consolidation is a very real possibility in this situation.

    Another of Walker's comments at the event elicited gasps. He believes that Apple's iPad/operating system is so entrenched in the market (75-77% of total market), that if competitors hope to make a dent in Apple's market share, they will have to price their tablets well below the iPad. He suggests a price in the range of $200-250-275 will be necessary to buy market share.

    An interesting observation by Walker was that the industry was not particularly impacted by the Japanese quake. As result, the inventory correction has been continuing while "economic head winds mount," he said.

    Walker also suggested that with respect to the transition from gold to copper wire bonding, it could be that in some applications, instead of converting to copper, it may be a better idea for some companies to go directly from gold wire bonding to a low-cost FC-type process (e.g., Cu pillar), which the industry will have to eventually do anyway as he questions the viability of wire bonding at around 32nm, 28nm, and below.

    There were a few positives in the Gartner forecast. For the next couple of years the major growth markets will be in smart phones, the tablet PCs, and SSDs. These areas will start to grow a little bit in 2011. In 2012, however, the growth market for tablet PCs will be 250%. But, he cautions, if you're not in any one of these markets, there's not much happening for the rest of 2011 and the first half of 2012. "In the second half of 2012, we think the economy will start turning around and we'll start seeing growth in PCs, LCD display drivers and LCD TVs, etc.," said Walker.

    -- By Debra Vogler, senior technical editor

    Insights from Citi's Tech conference: Capex slump, Samsung bump, 28nm & EUV ramps

    September 9, 2011 10:15 AM by ElectroIQ
    Citi brought a dozen semiconductor suppliers to its Technology Conference; what came out were common themes about an extended slowdown in demand and capex, good news from Samsung, and the status of 28nm ramp-up, 450mm wafer-size transition, and EUV lithography. The info below came out of notes from Citi analysts Tim Arcuri and Wenge Yang.

    Downturn extends into 2012, for most. Once upon a time 2Q11 was seen as the worst of the current downturn; then orders pessimism pushed that flip date out to 3Q11. Now it looks increasingly like the sector won't see any relief at all this year.

    After an expected -20% sales dip in 3Q11, Teradyne is being "cautious" on 4Q11 guidance, seeing "seasonal weakness starting in October" and "broad-based weakness" in tester orders (except wireless, thanks to Apple exposure). Citi's Wenge Yang notes that "all major players" in OSAT are cutting their capex in 2H11, which partly explains the soft SoC tester buy-in rate in 2H11.

    Applied Materials , too, is "more cautious" about its fiscal 1Q12 (Jan.2012) orders being up, partly attributed to Intel's reported freeze of Fab 24/22nm (Ireland) orders. To the positive, though, most SSG orders in the October quarter (fiscal 4Q11) are technology buys since wafer capacity expansion is "essentially nil."

    Not everyone's so pessimistic, though. Amkor feels "pretty good" about overall demand, thanks in part to its exposure to communication (smartphones) and gaming (seasonally strong). Utilization rates actually inched up above 80% in 3Q11, with "no notable inventory issues from most of its customers." KLA-Tencor wouldn't offer specific estimates about 4Q11 orders, but it did add some color to previous comments that implied "meaningful" growth, saying that it's a "reasonable scenario" since 4Q usually encompasses "positive seasonality." ATMI saw softer-than-expected foundry wafer starts in 3Q11 (-3% to -5% Q/Q instead of flat), but sees stabilizing forecasts from key customers into 4Q11, though they have yet to show anything "incrementally" better. Veeco 's 4Q11 should be ok, but expiring Chinese subsidies could snap back orders in 1Q12.

    And there's some growing hope on the horizon. Lam Research and Novellus confirmed Citi's report that Samsung is pulling in some tool shipments, "technology-related orders on the foundry side," to end-of-2011, which will help beef up some suppliers' 4Q numbers. ASML also supported the idea that orders have to rise in 4Q, or else customers will put at risk their stated 1H12 spending and technology objectives.

    Citi's Tim Arcuri continues to point to data indicating WFE capex run-rate bottomed out in 3Q11 at ~$20B, essentially the "maintenance level" which is impossibly low to sustain. For 2012 he expects "flattish" capex vs. 2011, with a -10% decline as the "worst-case scenario." That worst-case view would put WFE spending at around $26B-$27B, far above the current WFE order run-rate.

    28nm: A 1H12 story. Foundries (e.g. TSMC, GlobalFoundries) are taping out 28nm now but realistically the ramp is 1Q12-2Q12 until they can improve yields. ATMI looks to be designed into both TSMC's 28nm process chemistry and likely others (GF), and should grow revenues/wafer once 28nm ramps. NVLS also cited 28nm yield issues as a reason for recent foundry order pullbacks, but once they are resolved orders should flow again. LRCX said it has yet to ship any volume 28nm tools to major foundries.

    450mm: Hurry up and wait. The major backers of 450mm (Intel, TSMC, Samsung) are getting together over the next few weeks to formalize "a unified plan/consortium," Citi's Arcuri writes. Nonetheless, with rising capital intensity driven by ever more complex steps (and new ones, e.g. EUV), tool suppliers are fine with holding off on their 450mm development, he says. NVLS is "more cautious" on 450mm wafer-size transition, citing a "deflationary outcome" seen in the shift to 300mm. LRCX, on the other hand, sees a big window of opportunity to gain share at 450mm.

    EUV timeline compressed. Specifically talking about EUV, ASML expressed more confidence about the technology's ultimate viability, but time is running out to get to 60WPH targets by mid-2012, with sources still the key challenge, Arcuri noted. DRAM customers could get away with 50-60WPH for two layers, but other sectors (e.g. logic) are still uncertain. Eighteen tools are in the supply chain: 10 ordered and two more likely to order a tool each, but the other 6 are question marks in terms of timing. In the meantime, ASML plans a ~250WPH immersion tool for next year to fend off encroachment by Nikon which has gained qualifications at Samsung, TSMC, and INTC.

    From "Solar" to "Technologies:" What prompted GT Solar and OPEL Solar to change their names

    August 30, 2011 12:54 PM by ElectroIQ
    Both OPEL Solar International (OPL) and GT Solar recently dropped the "Solar" moniker, becoming OPEL Technologies Inc. and GT Advanced Technologies Inc. (GTAT), respectively.

    GTAT calls this a "rebranding and new corporate identity," since it has been marketing more crystal growth equipment to the LEDs manufacturing market, and aims for a broader customer base than the solar industry alone. Tom Gutierrez, president and CEO, says GTAT will "continue to look for strategic expansion opportunities into other adjacent markets."

    GT Solar acquired Crystal Systems Inc. in July 2010, beginning the expansion beyond solar equipment. Silicon growth for solar cells and sapphire growth for LEDs are complementary technologies, but require different capabilities and serve different customers. Learn more at www.gtat.com .

    OPEL Solar International became OPEL Technologies Inc. to avoid "confusion" about the company's two segments: high concentration photovoltaic (HCPV) solar panels and solar tracker systems, and III-V semiconductor device development.

    For OPEL Technologies Inc., a new website was launched at www.opeltechinc.com . For OPEL Solar Inc. (solar) the website remains www.opelsolarinc.com . ODIS Inc. (semiconductors) has a new website, www.ODISinc.com .

    The name change and website development allows each segment of the company recognition in the marketplace and unrestricted growth, said Leon M. Pierhal, OPEL CEO. CPV and III-V semiconductors are related technologies, as III-V semiconductor materials enable photovoltaic modules to capture a wider range of the solar spectrum. However, customers and applications can vary widely.

    --Meredith Courtemanche

    Notes from SEMI's Silicon Valley Lunch Forum: don't take off the economy's training wheels too quickly!

    August 26, 2011 12:18 AM by ElectroIQ
    Speakers at SEMI's Silicon Valley Lunch Forum (8/24/11, Santa Clara, CA) spoke of the "uncertain economy" and asked the rhetorical question, "is it time to panic?"

    Brian Matas, VP at IC Insights, noted that the temporary "solutions" to economic woes being implemented in the U.S. are impacting overall IC growth. Likening economic stimulus to a set of training wheels on a bicycle, Matas said that taking the wheels off must be done carefully, seeming to imply that politically, the U.S. may have gone from stimulus to austerity too quickly. Responding to a question about quantitative easing 3 (i.e., QE3), Matas said that it would be a good thing for the economy if the Fed were to implement it.

    Dean Freeman, Research VP at Gartner, warned that rising semiconductor inventory levels are causing a drop in ASPs. Furthermore, the financial meltdown is impacting consumer spending - something to keep in mind when approximately 60% of all ICs sold worldwide are due to consumers. Of particular note: Japanese consumers are reining in spending as a reaction to that country's disastrous earthquake earlier this year and U.S. consumers are also spending less. As a result, Gartner expects slow growth for the next two years until the supply/demand outlook improves. Capex spending is forecast to increase by about 11% in 2011 driven by Intel, foundry and NAND spending, said Freeman. Semiconductor capex should see strength from 2Q11 through 2013 before retrenching. The research firm will be issuing its complete forecast update in September.

    Dan Tracy, Sr. Director, Industry Research and Statistics at SEMI, told forum attendees that materials suppliers are seeing a significant slow down in the third and fourth quarters as a result of an over-reaction to the disaster in Japan earlier this year. Additionally, higher prices for gold and other metals and raw materials, as well as higher prices for oil are impacting the cost of materials manufacturing.

    -- Debra Vogler

    Apple begins post-Jobs era

    August 25, 2011 9:42 AM by ElectroIQ
    Steve Jobs has left Apple Inc. for stints before due to serious health problems. Today, Apple's CEO and figurehead announced that he would resign from the company, leaving it in the hands of Tim Cook.

    With Apple hugely influential to the semiconductor and MEMS markets, with rumors of a solar foray in the works , Job's departure could have ripple effects throughout the electronics supply chain.

    Tim Cook, Apple's COO, will take over as CEO. Cook took the reins during Jobs' most recent medical leave in January , and Apple's Board of Directors seemed pleased with his abilities. He takes the job with Jobs' recommendation. As COO, Cook was previously responsible for all of the company's worldwide sales and operations, including end-to-end management of Apple's supply chain, sales activities, and service and support in all markets and countries. He also headed Apple's Macintosh division and played a key role in the continued development of strategic reseller and supplier relationships, ensuring flexibility in response to an increasingly demanding marketplace.

    Steve Jobs' legacy at Apple can hardly be overstated. In a letter to shareholders and consumers , Jobs stated that "Apple's brightest and most innovative days are ahead of it," adding that he would continue to contribute to the company in a new role.

    Apple shares fell on Jobs' announcement, but Wall Street analysts remained uniformly behind Apple's succession plan and business prospects, says Rex Crum, MarketWatch . Apple shares remain up about 14% since the first of the year. The sell-off will be short-lived, analysts agree, as new buyers leap at the lower stock price for the successful company, and influential market watchers come out in support of Cook's leadership.

    What to look for in AMAT's 3Q11 results

    August 19, 2011 11:42 AM by ElectroIQ
    What to expect from AMAT's forthcoming (Aug. 24) fiscal 3Q11 results? Few surprises, limited visibility, and simultaneous weakness in both chips and solar, warn Wall Street watchers.

    Stifel Nicolaus' Patrick Ho, Citi's Tim Arcuri, and Barclays' CJ Muse generally agree that an industrywide order trough is imminent. The problem for AMAT, Ho notes, is that it's a convergence of troughs in not only semis but also solar, as well as FPD, so there's no safe harbor from known semi industry cyclicality. Ho's newly revised 2001 estimates: $10.7B sales and $1.45 EPS, down from $11.1B and $1.55. [Update 8/22: Caris & Co.'s Ben Pang wades into the discussion, noting that the back-to-school season isn't much of a boost this year, either; he thinks AMAT will meet Street expectations for 3Q but probably not 4Q. ]

    Citi's Tim Arcuri is more bearish, anticipating "very poor guidance" with EPS maybe half what the Street is projecting ($0.17 vs. $0.33), but interestingly, he says overall "not bad enough to have negative preannounced." (He is lowering his AMAT outlook for EPS to $1.21 in 2011 [vs. $1.35] and $1.01 in 2012 [vs. $1.21].) Muse's outlook for AMAT is also bearish: $10.19B in 2011 sales and $1.25 EPS (vs. his "industry consensus" of $10.86B and $1.36), falling to $9.42B and $1.20 in 2012.

    AMAT likely won't offer much sector visibility in its call, which Muse expects will be largely "uneventful." Besides clarity in softness in all its key markets, AMAT likely will face some investor blowback about its acquisition of Varian Semi. Equip. Assoc. (VSEA) -- which was all cash and, as it turned out, at the market's midcycle peak. AMAT also has to deal with solar slowness as customers "finally start to curb cell capacity expansion on cell inventory + demand uncertainties," Arcuri reports, specifically citing a "multihundred-million-dollar cancellation" from Chinese customers.

    Everyone generally expects an imminent trough -- Muse sees a -20% decline in current-quarter orders (-20% silicon, -40% solar), and another -10% in the next quarter, while Arcuri sees a -15% orders decline (-50% in solar) before any pickup in early 2012 when Samsung should offer more capex. Following a 2H11 trough, "2012 is shaping up to be at/above normalized level," he writes, with WFE orders "rebound[ing] to $30B run-rate again," Arcuri says.

    Japan manufacturers' newest hurdle: A strong yen

    August 17, 2011 8:53 AM by ElectroIQ
    A soaring yen over the past year is adding an extra burden to Japanese manufacturers who are already pushing hard to rebound from the March 11 disaster.

    The yen has gained about 11% in value over the past 12 months, from roughly ~¥86/US$1 to now ~¥77/$1. (Two years ago it was north of ¥100.) For many companies that's a double-edged sword: a higher yen means higher prices, sales, and profits, though it's somewhat hollow as it's not really tied to end-demand. But it's a big problem for companies whose costs depend upon domestic purchases and procurements, or who have higher exposure to exports vs. imports. Every ¥1 rise in the 2010 dollar/yen rate erased ¥2B from Sony's operating profit, for example; Honda loses ¥15B for every ¥1/USD appreciation.

    "The yen trading below 80 yen to the dollar is an extraordinary level," noted Shuichi Aoto , managing director at Mitsubishi Motors, quoted by the Asahi Shimbun . (According to the paper, the ¥76.29/USD on Aug. 1 was fractionally shy of a post-WWII record.) "We will be in an extremely difficult situation even if we consider steps to cope."

    The strong yen "has ushered in a period of Japanese manufacturer exodus," according to Toyota senior managing officer Takahiko Ijichi, quoted by the Nikkei . Sony's outsourced production now accounts for 50% of TV production, vs. 20% a year ago. Hitachi is considering widening its overseas materials/components procurement from current 36% to 50% or more. Mitsubishi Heavy Industries is ramping up its first nondomestic gas turbine plant (in the US), hoping that a local supply operation will reduce exposure to foreign exchange rates. Carmakers Toyota and Honda are building new plants and revising their corporate structure to improve proportions of local procurement in North America.

    In our industry, even Toshiba is ready to rethink its flagship NAND flash operations, after the strong yen has cut operating margins in half (20% to 10%) in just six months. "If the yen stays this strong, we will have to examine each business to see if it can really continue operating in Japan," said exec officer Makoto Kubo, quoted by the Nikkei . Ramping output of more 2Xnm chips this year will help reduce costs, but "if the yen's appreciation reaches very high levels, the impact will be too big to offset through improvements in production technologies."

    (Tokyo Electron, meanwhile, reports export sales for its equipment (semiconductor, FPD, PV) as yen; some settlements are in dollars, but forward exchange contracts are made at the time of booking, so "the effect of exchange rates on profits is negligible," the company said reporting its most recent fiscal numbers.)

    Panasonic, too, is dented by foreign currency swings -- every ¥1 rise vs. the dollar and euro trims operating profits by ¥3.8B and ¥1.7B, respectively, notes managing director Makoto Uenoyama, in an interview with the Nikkei . "Given Japan's higher tax rates and power-supply restrictions, maintaining domestic production is becoming increasingly difficult." To help mitigate its currency exposure, the company is increasing its emphasis on "forward exchange contracts" beyond the current 50/50 proportion, and will push more procurement and production out of the country. Plans include moving procurement functions from its Osaka HQ to Singapore, procuring more parts and materials from China and other Asian countries, and raising overseas procurement ratio from 53% to 60% in fiscal 2012. A new Li-ion battery plant in Suzhou will take parts from local manufacturers, supplying batteries to Chinese PC makers, and Panasonic will increase some white-good production in India and Brazil for those local consumers.

    Another problem: Korean companies have fought against their nation's similarly weak won by cutting prices of products, something that further handcuffs their Japanese rivals. "To compete against our South Korean rivals on an equal footing, we have no choice but to shift production overseas," Uenoyama said. And that might mean a dramatic shift in strategy. "I don't think we can survive if we continue to focus on selling consumer products. We should shift our attention to environment/energy-related operations and offer a package of energy-saving products to businesses and consumers," he said.

    Beyond individual corporate efforts to minimize exposure by outsourcing or rebalancing import/export levels, there's not a lot that can be done to check the yen's ascent. A sluggish US economy and recent credit rating drop, and the Fed's subsequent pledge to freeze interest rates at basically zero for the next two years, won't help. (Nor that the yen is one of the currencies investors generally view as a "safer" investment in times of economic turmoil.) Eventually the Bank of Japan might step in and expand asset purchases or lower interest rates itself, though such moves won't be popular internationally, especially since the US has more freedom with its interest-rate levers, notes the Nikkei . But don't be surprised if the yen keeps getting stronger, maybe even to ¥74/$1, warns Osamu Takashima, chief foreign exchange strategist at Citibank Japan Ltd., quoted by the Nikkei .

    SMIC's new CEO: Best fit, but work ahead

    August 9, 2011 3:01 PM by ElectroIQ
    SMIC has officially named a new CEO to replace David Wang who resigned last month after what amounted to a no-confidence vote. Tzu-Yin Chiu, who also becomes an executive director of the company, comes with nearly three decades of experience in the semiconductor industry, most recently:
    • Hua Hong NEC Electronics (president/CEO)
    • Shanghai Huali Microelectronics (president/CEO)
    • Silterra Malaysia (president/COO)
    • Hua Hong International Management (SVP/COO).
    He was at SMIC from 2001-2005 as SVP of Shanghai operations, and before that was TSMC's senior director of fab operations. At the start of his career he was department head of AT&T Bell Labs' high-speed electronics research department.

    SMIC chairman Zhang Wenyi touted Chiu's "extensive technical and management experience in the semiconductor field, as well as his in-depth knowledge of SMIC and the Chinese semiconductor industry." Chiu himself says his mission "is to further improve SMIC's operations, customer support, technology offerings, and market competitiveness, while continuing to develop long-team strategic relationships with key customers." He also pledges that SMIC will play a more important role in the global semiconductor foundry sector.

    Chiu "is a very good choice and probably the best solution for SMIC," says Samuel Tuan Wang, analyst at Gartner -- and former SMIC exec himself, having led SMIC America operation for eight years. He has "great leadership skill," and "is well liked by employees and customers." His prior experience at SMIC and close work with the Shanghai government while at HHNEC also help his cause.

    When David Wang stepped down, there was some concern that there might be a power struggle between Taiwanese and Chinese management , with the move perhaps indicating a strategic swing in favor of more domestic leadership. Chiu actually comes from Taiwan, Gartner's Wang noted, which suggests both Datang and CIC think he's the best candidate on either side of the Strait. He also noted that Wang's predecessor at SMIC, Richard Chang, recruited a lot of Taiwanese managers, but also promoted many Chinese as well. Ultimately any recent turmoil in SMIC's business can be more directly attributed to a loss of wafer business from TI once Nokia dropped the Symbian platform -- pushing SMIC's fab utilization rate below 80% -- and less to internal strife, he suggested.

    SMIC needs to move away from its reliance on customers who develop internal IP (customer-owned tooling, or COT) and focus on its more leading-edge technology (which hasn't had enough R&D funding) and winning more customers there, he suggested.

    But Chiu's appointment may not simply calm the waters around SMIC. He may be the best candidate, but he'll need to form his own team, Gartner's Wang noted. "I think that some key managers will leave. Lack of experienced managers will be the issue now." With a still-unsettled and possibly political atmosphere, "many experienced managers (from Taiwan or from the US) will hesitate to join SMIC," he suggests. "Chiu will have a very challenging job ahead."

    Renesas: Rebuilt and revitalized

    August 1, 2011 1:27 PM by ElectroIQ
    An update on Renesas' rebuilding efforts following the March 11 disaster offer an example in courage, teamwork, dedication, and learning from adversity -- sometimes with unexpected benefits.

    The March 11 earthquake/tsunami disaster caused great destruction and disruption across every imaginable plane (most significantly on the human side). Thanks to frequent and valuable reporting from Takeshi Hattori , readers of SST had immediate and first-hand information and insights about damage assessments, availability of resources, and recovery efforts. From a macro perspective, Japan's response to the March 11 disaster has been nothing short of inspiring; the spirit of Kizuna, of bonding together, has many examples.

    A semiconductor industry example of both corporate and human inspiration is Renesas Electronics. Only five of Renesas' domestic sites across Japan (10 wafer fab plants and 11 assembly/test facilities) were impacted; the worst was at its Naka factory in Ibaraki Prefrecture, home to 200mm and 300mm facilities (wafer fabrication and test/packaging). Initial messages from Naka suggested there was concern whether the site would be salvageable at all (structure, infrastructure, equipment). But after intense efforts, recovery is about 30% ahead of schedule for restoring operations at Naka to pre-earthquake levels, with both 200mm and 300mm lines now up and running, with projected return to 100% capacity in September. See below/after damage photos below.

    Ali Sebt, COO of Renesas Electronics America, related the Japanese company's rebuilding efforts to SST , citing the quick recovery to effective planning, teamwork, help from partners and customers, and overall a monumental effort of dedication, sacrifice (e.g. carpooling, or even buying bicycles for a 4+hr commute) and communication. Eighty thousand people contributed to the company's recovery on a global basis, including 2500 external employees -- all of whom, from the beginning, "shared a sense of urgency, and also optimism," he emphasized.

    From a conversation with Sebt, several themes emerged:

    Great challenges offer great opportunities. The March 11 disaster offered lessons in ways to change the way things are done, and generated a "renewed and reenergized" focus across multiple planes: customer interaction, manufacturing redundancy, reemphasis on quality and reliability, Sebt explained. "We're a different company now." Renesas was already in the process of flipping its customer landscape from a 60%/40% domestic vs. overseas dependence (about 50/50 in micros) to a 40%/60% globalized ratio, Sebt noted.

    It also gave customers a new concern too. Now they're talking about continuity of supply commitments, dual-sourcing, and responding to new RFQs with new stipulations about risk mitigation plans. This, Sebt said, is "healthy for the industry and overall economy."

    JIT revisited. Some have argued that, while recovery efforts have been commendable, the real savior was "luck" in the form of an unrelated inventory overhang built up for several quarters, which softened the blow to the supply chain. "We were fortunate" in this regard, Sebt agreed. "Had we come into this quake from an allocation period, it would have been disastrous." That inventory overhang only kept until the May-ish timeframe, he noted, so credit must also go to resiliency and determination of the company's staff and partners.

    The March 11 disaster has put a critical spotlight on the just-in-time (JIT) delivery method. In JIT, inventories are kept to a minimum, and the redundancy of building a given device in more than one location can mean additional cost, the antithesis of a lean environment. "Absolutely there is a broader rethinking" of JIT, Sebt acknowledged. Major customers who categorize components into strategic buckets (e.g. sole-source, proprietary architecture) vs. commodities are taking a closer look at how to manage their inventory. And for smaller and midsize customers who have completely outsourced their manufacturing and components, this has been "an awakening for them" that they have very little visibility to security and continuity of supply.

    "JIT delivery was the pride of the whole ecosystem," Sebt said. Now, having inventory is "not such an evil thing;" now they see it as a good thing. "All feel it's too risky to be in an inventory-less situation all the time," he said.

    Globalization of manufacturing. Part of a bigger companywide strategic examination (a "100-day plan") was to take account of how Renesas tapped a worldwide network of fabs and its supply chain. Now, there's a new emphasis on why that balance of internal/external fab network is crucial. Including the company's external fab network (which has been a 5%-10% boost in capacity), Renesas will "continue to do beyond 100% capacity," Sebt noted. GlobalFoundries' site in Singapore was originally a Hitachi fab, and Renesas has maintained some production there; TSMC, meanwhile, has been a partner since and through the 65nm node. "Once we're back online 100%, we don't intend to stop using external fab networks," Sebt explained; "we will continue those relationships as a business continuity measure." And that increase in outsourcing means Renesas can continue to grow without additional capital investment, he pointed out.

    Before and after

    These before/after photos were taken on April 11, nineteen calendar days after the March 11 disaster -- that's less than three weeks. And this doesn't show the "third dimension" of rebuilding beyond the visible equipment and room itself: e.g., gases, connection to servers, water/electricity, etc. Initial damage assessments had to be done via flashlights; damage "was very heavy," Sebt said.

    Notice even the building's air ducts -- not terribly strong structurally -- many of them stayed intact.



    The involvement of partners in rebuilding was particularly visible in rebuilding the cleanroom operations. The president of one equipment supplier personally visited Naka, bringing lunch for his employees, Sebt noted. In other cases, suppliers' other customers deferred equipment (e.g. gas indicators) to help. Renesas also borrowed spare parts from US and other operations that had them in stock.


    There's also been an unexpected benefit to rebuilding the Naka cleanrooms and facilities. Putting in new or reconditioned/cleaned equipment has, in some cases, raised yields, Sebt noted.

    Making sense of INTC's 2Q11: PCs down, capex up

    July 22, 2011 2:03 PM by ElectroIQ
    Intel handily beat expectations for its 2Q11; PR here , analysis is all over the Web . Besides the general number-crunching, here are two key themes relevant to our semiconductor manufacturing audience:

    - PC growth lower. Sales in INTC's PC group rose 11%, despite general malaise reflected by other industry watchers -- and indeed INTC now is cutting its PC growth expectations to ~8%-10%, though sales will still be higher thanks to "a very rich mix" of enterprise PCs, noted CEO Paul Otellini in the financials conference call . INTC also continues to see above-average growth in emerging markets, e.g. India, Russia, China, and Latin America (Brazil will likely be the third-largest PC market in 2012) all showed PC shipment growth in the mid-teens during the quarter.

    Otellini also reiterated his view that PCs aren't really threatened by tablets, but the new devices are actually "additive to computing" as "a companion device" and won't replace PCs, though netbooks are showing signs of being affected. (Also note that INTC's PC forecast, while lowered, is still higher than the single-digit growth -- if any at all -- professed by other industry watchers.)

    - Capex budget higher. Most relevant to our semiconductor industry were the comments about INTC's hiked capex budget for 2011, and how most of that is going into factory-building, noted CFO Stacy Smith. "It's been a long time since we've had to build incremental shelves, but the growth in our business now requires it," he said. "So we're putting in place some clean room space that we haven't had to do over the last couple of generations."

    Often when a company raises numbers in the short-term, it's just pulling them in from future plans -- and some of this increased 2011 capex is just that, Smith acknowledged on the call. "We're going a little faster on the 40nm factories," where the company "saw some opportunities to do some things in the infrastructure" to be able to incorporate post-40nm work, even down to 10nm and 7nm, he said. "It gets kind of high ROI to do that now versus having to retrofit those factories later."

    Smith also hinted that 2012 capex will increase again, reiterating that INTC's capacity spend tends to be "a couple years cycle". "Expect elevated capex next year relative to the historical trend line," he said, but without specifically committing to a figure. (Later in the call, Smith noted that the capacity going in can be throttled back "if things end up being softer" than anticipated unit growth, much like the company did in 2009.) (Deutsche Bank's Ross Seymore pegs INTC's 2012 capex at $8B, down -20% from 2011 and ~14% of sales.)

    Some other points to ponder about capex, courtesy of Credit Suisse's Satya Kumar:
    • In 1H11 INTC spent just a hair under 50% of its total 2011 capex budget, implying neither frontend- nor backend-loaded spending. Given negativity swirling about 2Q-3Q semicap equipment orders, that linearity probably a good thing, especially for companies with INTC exposure.
    • From a macro perspective, note that it's the foundries who have been generally understood to have overextended and now cutting back their spending, and that sector (as well as Samsung) has yet to be heard.
    • INTC's capex is being raised, even as its PC unit shipment growth is lowered.

    Getting bearish: Analyst cut back 2011 SCE, but improve 2012

    July 8, 2011 2:23 PM by ElectroIQ
    A handful of industry watchers are lowering their 2011 outlooks for semiconductor capital spending, betting that there's more bad news ahead -- but 2012 might not be as bad as feared.

    The bad news? SCE orders, which have been on a downward slide, now likely won't get better (and probably will get worse) through 3Q11, and 2011 looks a little less rosy than before. The good news: many think 2012 might not be as rough as feared, so the expected Y/Y dropoff may not be as painful.

    Credit Suisse's Satya Kumar is lowering his expectations for capex, wafer starts, and some memory themes, citing elevating chip inventories, still-sluggish consumer PC demand, and some non-Apple tablet vendors cutting component orders.

    For capex, Kumar is lowering his 2011 outlook for semiconductor capital equipment to 9% growth (vs. 15%) to $55.2B, but raising it for 2012 to flat growth/$55.1B (vs. a -9% slide). More granularly, he sees SCE orders down about -20% sequentially in 2Q11, and 3Q11 orders flat to down -10%. "SCE companies have been talking about order pushouts since April," he explains, and "the order and capex environment has not improved through June."

    Kumar is still bullish on rising capital intensity in semiconductor manufacturing. PC and tablet sell-through is still up 15% in 2011 (smartphones up 50%), he notes, so the issue is not so much weak consumer demand -- it's rethinking expectations about supply chain normalization vs. sell-through, he says.

    Other analysts are also lowering their 2011 outlooks. Days ago, Barclays' CJ Muse likewise lowered his take on semiconductor equipment spending, recasting his 2012 outlook to $48.5B (a -10% decline vs. a flat/-10% range). His main concern is foundries which could slash spending by -20% next year; NAND makers will cut back to flat or -10% too, and there'll be a -15% decline in logic led by a -22% dropoff at Intel, he warns.

    Also in the past week, Needham analyst Edwin Mok cut his semi capex estimates for both 2011 ($56.1B vs. $59.2B) and 2012 ($56.9B, ekeing 1% growth), citing pushouts by Samsung and TSMC that have dented 2Q11 orders by -10% to -25% -- and he thinks there will be more bad news coming in the current quarter (3Q11), with sales possibly flat or even down another -10% (overall Street is expecting -2%). While some of the pushed-out orders have returned [e.g. Samsung for NAND], we believe TSMC has put its Fab 14 expansion on hold," Mok writes.

    And RBC Capital's Mahesh Sanganeria has reduced his outlook for semiconductor capital spending to 4% in 2011 instead of 11% (though improving 2012 to a -9% decline instead of -17%). TSMC orders have helped give a brighter picture, but now the foundry seems "caught up after underinvesting" and since April has pulled in the reins "significantly," he writes.

    Overall the new outlooks have several things in common:

    - More bad news in 3Q11, but probably a trough for overall SCE orders, and for front-end tool shipments.

    - For sector stocks, valuations are really low -- as in low-teens or even single-digit multiples vs. 2011 expected earnings (though of course earnings outlooks change quarterly), and in the mid-teens vs. S&P multiple. Many chip equipment stocks have been taking a beating, down 10%-20% or more in 2Q11, most likely as investors gird up for anticipated lean times ahead for the industry -- so the analyst bears' partial forecast improvements for 2012 could be a welcome sign.

    NCCAVS Junction Technology Group Meeting at SEMICON West

    June 29, 2011 10:15 PM by ElectroIQ
    Be sure to check out this annual event. This year, it will be held Thursday, July 14, 8:30AM-5:00PM in Moscone Center, South Mezzanine, Room 250. The topic is semiconductor and solar junction technology. Co-chairs are John Borland and Michael Current. For more info, go to http://www.avsusersgroup.org (Debra Vogler).

    Wanna be AMD's CEO? Here's your checklist

    June 20, 2011 2:56 PM by ElectroIQ
    AMD's got a problem: Nobody wants to be its CEO, or at least those that have been pre-selected as prime candidates appear to be uninterested. According to reports , that list includes: Apple CEO Tim Cook, Oracle copresident (and ex-HPer) Mark Hurd, EMC COO and ex-Inteler Pat Gelsinger, and Carlyle Group managing director Greg Summe. Interim CEO (and current CFO) Thomas Seifert has said he doesn't want to be considered for the permanent job.

    One thing an AMD CEO candidate will want to know is the BoD's dynamics: is there consensus on a strategic direction, and how much input will the new exec have in setting strategy? "In this case the search is not just about finding a proven CEO who fits into the culture, but much more importantly, a transformative leader," Louis Gerhardy, a former exec-search consultant and market analyst, told Bloomberg . "The selection will have a profound impact on shareholder value at AMD."

    It can typically take six months to a year for high-profile position like this; "finding the right candidate is important, more important than hitting a specific time window," Siefert said in the company's 1Q11 call. But "if by the end of the summer they haven't done something, then they've got a problem," Raymond James analyst Hans Mosesmann told Bloomberg .

    So what else should the new AMD CEO -- whoever it is -- expect to deal with? Uche Orji of investment bank UBS has a checklist :

    Clear the air. One challenge that wraps over all others: the need for a stronger strategic view that moves AMD beyond a current perceived role (justified or not) as just an alternative to Intel, Orji says.

    Mobile strategy: "religious" roadmap, beyond tablets. Its rivalry with Intel aside, AMD has not been seeing growth inroads into mobile devices (tablets and smartphones), which apparently was the key sticking point between the company's board and ex-CEO Dirk Meyer . AMD's first-gen product gives it a toehold in tablets, but it's a good start, "especially as AMD can differentiate on graphics," Orji notes. But adopting the ARM architecture (either organically or through M&A) may not be the way to go, as it "could dilute resources that would hurt its ability to compete in its core x86 market," outside of which it hasn't executed well.

    Unfortunately, everyone else is pursuing those markets too, so AMD needs to also take care and not become "the umpteenth chip firm" with a me-too ARM-based processor."

    Leverage graphics. Better microprocessor/graphics integration was the reason AMD took over ATI back in 2006 . Now, the company needs to take its fight with Nvidia in the consumer space and push harder into professional graphics, Orji argues.

    Server focus. Going fabless has had some advantages (e.g. no exorbitant spending on next-gen process and fab facilities), but at the same time there's a concerning trend: AMD's share sunk to 7% in 1Q11, down from 22%. ("The lesson: owning server marketshare is more important than not owning a new fab," summed Credit Suisse's John Pitzer.) Orji thinks the new AMD CEO needs "a more viable go-to-market strategy" that approaches server chips as "a service business," with appropriate sales and support underpinnings.

    Elsewhere, get friendly. Partner on baseband, connectivity, and software.

    Reduce debt. AMD's long-term debt is around $2.2B (total debt almost $2.3B; that's half of what it was from 2007-2009. But with ~1.75B in cash, that's a debt-to-equity of 143% , way way above peers (single-digits) and 5-year return-on-equity is in the red.

    ElectroIQ Moves to New Platform

    June 16, 2011 1:37 PM by ElectroIQ
    The ElectroIQ website is now residing on a new platform, giving you new functionality, faster load times, improved search and easier navigation. It will also make it easier for us to post new content, so we will be able to more quickly deliver a greater array of news, feature stories, blogs, videos, podcasts, white papers, wires news feeds and more.

    One of the most notable changes is how the navigation bar works. In the past, the topic centers for each of our channels (semiconductors , photovoltaics , packaging , nanotech and MEMS ) appeared immediately below the nav bar.





    Now, they appear in an easy-to-use drop down menu.













    The new platform also implements new search functionality using a product from a company called Ramp . This product, called the MediaCloud, gives all users the ability to sort, navigate and share search results across all of our content, including video, audio, text and images. With video and audio files, MediaCloud produces time-stamped transcripts from the original files. Text articles, images and the transcripts are processed through a natural language processing technology to create a unified set of tags and categories for all of our content.

    The platform itself is a web content management system from Adobe (formerly Day Communique) called CQ5 . Adobe calls it simple, intuitive web publishing. It is mostly invisible to users but easier for us editors, with in-context, drag-and-drop page design; in-context content authoring; in-context digital asset editing and keyboard shortcuts for native application feel. Check out a video Adobe produced!

    No software migration come with perfect results. If you notice any problems, please let us know (just shoot an e-mail to psinger@pennwell.com).

    A big thanks to the PennWell digital media team for making this happen. A special thanks goes to Robert Williams, the digital product manager for the ElectroIQ website; Meredith Courtemanche, digital media editor; and to all the folks in PennWell's Tulsa office, particularly David Warren, vice president, digital media; and Leif Nevener, senior product manager. Also a special thanks to Nicholas Iervolino who worked through the night to make it possible.

    Now that we are working with a greatly improved backend program/platform, we will be quickly focusing on enhancing the look and feel of the site and adding some exciting new coverage this Fall. Stay tuned for more information. (Pete Singer)

    Designing with eWLB packaging technology

    June 8, 2011 5:13 PM by ElectroIQ
    Rajaran Pendse, VP of the Technical Marketing Group at STATSChipPAC, told MEPTEC lunch forum attendees (6/8/11, Biltmore Hotel, Santa Clara, CA) that packaging technology and functional integration have progressed on three parallel fronts: package level, wafer level (fan-in/fan-out WLP), and at the silicon level (TSV). “There is a convergence towards silicon and wafer level approaches driven by I/O density trends,” said Pendse.

    The company is already in HVM with standard eWLB technology (embedded wafer-level ball grid array) – a fan-out wafer-level technology that Pendse says is a breakthrough in terms of high routing density, low parasitics, and small form factors. The cost efficiency comes from the elimination of substrates, bumping, and underfill – the limiting factors in flip-chip packaging. Pendse also described work that the company is doing on more advanced versions process.

    The process flow for eWLB comprise four basic steps: reconstitution of dies to an “artificial” wafer, redistribution, ball application and singulation, and test/route/scan/pack. To determine whether or not using eWLB will be cost-effective, the company has developed a design metric called “fan-out ratio” (FR). [It’s defined as: (I/O density of the die-substrate)/(I/O density of substrate-PCB).] When FR<1, the design calls for using WLCSP as the solution; when FR is between 1 and 3, the design calls for using eWLB; and when FR>3, the solutions should be either fcFBGA or fcBGA. “We have used FR as a parameter to define the application space and cross-over point among different packaging choices,” noted Pendse. (Debra Vogler)

    Design the grid to be DC at Research @ Intel Day (6/7/11, Computer History Museum, Mountain View, CA)

    June 7, 2011 5:37 PM by ElectroIQ
    According to Intel Researcher, Guy AlLee, if engineers could design the grid today, they would make it DC. According to AlLee, the world is becoming DC, e.g., 80% of the power handled by power electonics is DC, alternate energy (PV, wind) is DC, and energy storage (batteries) is DC. The key to efficiency says Intel is to eliminate conversions and higher voltage.



    -- Debra Vogler

    Intel demonstrates "pedal power" for emerging markets at Research @ Intel Day (6/7/11, Computer History Museum, Mountain View, CA)

    June 7, 2011 5:24 PM by ElectroIQ

    Intel's Frugal Computing project enables people in emerging markets to generate power by simply pedaling a bicycle. In this example, according to Intel Researcher, Venkat Natarajan, by pedaling for 5min, a person could generate enough power to charge a cell phone for 5hrs, or provide lighting for 5hrs. By pedaling 10min, a person could generate enough power to charge a netbook for about 2hrs.



    -- Debra Vogler

    Intel's Smart Vehicle: from the Research @ Intel Day (6/7/11, Computer History Museum, Mountain View, CA)

    June 7, 2011 4:59 PM by ElectroIQ


    Intel Researcher, Joseph Pitarresi, described what Intel is developing to enable "anywhere car access." Such access creates an extensible client-to-cloud architecture for connected cars and service. The technology also brings the IA continuum of secure, personal computing experiences inside vehicles, noted Pitarresi. With one touch, the car, cloud and phone can be paired.



    Also listen to this interview with Vijay Kesavan on the topic:


    --Debra Vogler

    "Magic Mirror" at the Research @ Intel Day (6/7/11, Computer History Museum, Mountain View, CA)

    June 7, 2011 4:48 PM by ElectroIQ

    Intel Researcher, Nola Donato demonstrated the Magic Mirror: a gesture-controlled parametric body model display using Intel's high-performance rendering engine. Applications include retail (for digital signs), online clothing sales, clothing manufacture, and entertainment. The long-term goal is a virtual dressing room with a realistic avatar of the consumer that can try on the latest fashions.



    -- Debra Vogler

    Photos from Research @ Intel Day (6/7/11, Computer History Museum, Mountain View, CA)

    June 7, 2011 4:45 PM by ElectroIQ


    A robot getting a “shave” from another robot greeted visitors to the Research @ Intel event at the Computer History Museum (6/7/11, Mountain View, CA). The robots are a send-up of the Intel TV commercial in which a man gets a shave from a robot (Debra Vogler).






    Intel as a foundry?

    June 6, 2011 4:24 PM by ElectroIQ
    Intel CFO Stacy Smith is on record saying that combining other chip design IPs with Intel's architecture core "would be fantastic business for us." That, of course, is spawning all sorts of speculation about the company's future plans, and whether it could be angling for business from consumer juggernaut Apple.

    With its recently unveiled 22nm trigate structure set to ramp later this year, maintaining the company's 1-2 year technology headstart over competitors, Intel could, if it wanted , throw open the doors for some foundry customers

    It's not a slam-dunk decision, though. Putting Apple or Sony's IP onto an Intel core is one thing; it's another entirely if a customer wants a custom-designed core. "Then you are only getting the manufacturing margin," noted Smith, and "that would be a much more in-depth discussion."

    Smith was quick to point out that no proposal from Apple or others is in the works right now, and that foundry isn't a driver of Intel's capex.

    So how much of this is real?

    Eric Sherman over at BNet thinks there could be a few reasons why Intel would take on foundry orders: it wants to learn more about making low-power mobile chips (unlikely given IP restrictions), or there's a lot of money available (Intel isn't hurting for sales). The only reason that makes sense, he argues, is that Intel sees, and wants to head off, a long-term trend of falling utilization due to consumer purchasing shifts.

    Piper Jaffray's Gus Richard echoes the idea that Intel is on the hunt for fab-filling foundry orders , citing scuttlebutt that Intel has been talking to OEMs -- including Motorola, a Toshiba customer -- and is looking to hire ASIC engineers and support staff. He pulls in other possible customer names into the mix, including EMC, Cisco, Juniper Networks, Sony, Apple, Nokia, and others who need leading-edge logic, and the x86 architecture -- i.e. not ARM or other competitors. What it's all boiling down to, he says, is "will Intel learn how to design its way out of a PC, or will the foundries overcome the process complexity?"

    And at its recent investor day, Intel "sent what we thought was a clear message that it was very interested in some type of foundry relationship with AAPL," notes Susquehanna analyst Christopher Caso . Firstly that means Apple's business is indeed up for grabs, i.e. not locked in by previous partner Samsung -- nor a shoo-in for speculated new partner TSMC. Which, secondly, is someone Intel is increasingly thinking of as a process-technology competitor, so INTC wants to keep business away from them, especially any ARM-based competition.

    Update: Citigroup's Glen Yeung is adamant that an Intel-Apple foundry partnership is on the horizon, perhaps for the A4 and A5 chips (currently Samsung-made) -- but probably on the condition that Apple converts to the x86 architecture for handsets and tablets, not an ARM-based core. INTC's recently-announced trigate architecture is the main draw for Apple, he notes. TSMC also stands to win some Apple foundry business, though the challenges of shifting to 28nm may spook AAPL into siding with Intel -- and in fact that might be why Intel isn't porting its Atom chips to 22nm just yet, Yeung says.

    Yeung adds that fabbing Apple's 122mm A5 chip would require ~24,000 wafers/month, which is roughly equivalent to an Intel fab, but requirements would double with Apple's next chip and any quad-core parts.



    A history lesson in M&A fundraising

    How much have things changed in 13 years' of M&A? That's the amount of time passed from Applied Materials' most recent offering ($400M) and what it's raking together today to help fund its $4.9B deal for Varian Semi, a mix of five-, 10-, and 30-year bonds, notes Bloomberg's Tim Catts .

    Some quick data pulled together by Bloomberg:

    - The series of new notes all yield more than a full percent (107-175 basis points) more than similar-maturity treasuries, with interest of 2.65% (five-year), 4.3% (10-year), and 5.85% (30-year). Average data from Bank of America Merrill Lynch shows 3.64% for A-rated debt maturing in 5-7 years and 5.08% for ones due in 10-15 years.

    - Borrowing costs have sunk a full three percentage points since AMAT's last $400M offering on October 9, 1997.

    - On the other hand, so have returns -- yields on investment-grade corporate bonds were 3.86% on June 1, vs. 6.82% back in 1997.

    MEMS can benefit the largest interconnected machine on earth

    May 20, 2011 10:39 AM by ElectroIQ
    I never thought about it before – but the U.S. power grid is the largest interconnected machine on earth, noted Igor Paprotny, post-doc researcher at the Berkeley Sensor & Actuator Center (BSAC). The grid has 9,200 generating units, 1,000,000MW capacity and 300,000 miles of transmission lines. This aging behemoth would benefit from having sensors that report on system status and health. The urgency of need is evident given data Paprotny presented: there has been a 126% increase in non-disaster related blackouts affecting at least 50,000 customers (reported on CNN, 8/9/10). The estimated loss from the Northeast blackout in 2003 alone was $6B.

    Researchers at BSAC have developed a self-powered wireless MEMS sensor. Their long-term goal is to use it for ubiquitous power systems sensing, especially as they further develop their sticky-tab meter, i.e., one literally sticks the MEMS sensor onto a location, making installation very inexpensive. Some of the applications include: modules that measure flow of power in the grid, underground cables that report on their condition, wireless electric meters, and equipment status ID chips. The group has already devised a project whereby the sticky tab modules are placed on top of circuit breakers in Cory Hall at UC-Berkeley.

    The version 1.0 form factor of the MEMS sensor module is 3.5cm X 1.5cm. Version 4.0 (the sticky-tab) will be much smaller. Among the challenges the researchers are pursuing: AC scavenging/overcurrent protection, and determining whether or not the sensor degrades equipment performance. They also need to determine if the sensor will work for 40+ years. (Debra Vogler, Sr. Technical Editor)

    ----------------------------------
    2 comments:
    Anonymous
    May 31, 2011 08:01 PM
    it WOULD benefit from having sensors that report on system status and health.

    http://www.sdwebworks.com


    Andrew
    Jan 25, 2012 12:25 AM
    You think this MEMS sensor gonna work for 40 years. I doubt. It will be the same things like the previous one. Blackouts...

    Who has the toughest ITRS road?

    May 10, 2011 9:09 AM by ElectroIQ
    A recent half-day SEMI Northeast Forum at the U. of Albany's College of Nanoscale Science and Engineering (CNSE) explored where the ITRS is leading manufacturers and suppliers, from four viewpoints: metrology, contamination control, lithography, and backend. One overarching thought coming away from the excellent talks: there's a lot of work to be done in each of those areas... so who's got the toughest challenges ahead of them?

    On the ITRS Roadmap, conference papers appear as early as 12 years prior to device/material productization, process research tools show up to eight years prior to production, and development on alpha tools is usually ~2 years prior. But metrology requirements precede the actual research tool, e.g. to figure out the ins & outs of defect detection, so usually researchers have to make do with something suboptimal for R&D, explained Alain Diebold from Albany CNSE. (A good example of this is EUV: mask substrate defect inspection, mask blank inspection, AIMS, patterned mask inspection.)

    Looking at the 2010 metrology roadmap, there's a lot of yellow (indicating known solutions but not yet meeting requirements, i.e. tool matching) in metrology for litho, frontend processes (transistors and capacitors, equivalent oxide thickness), and interconnect. But for 16nm (~2016) and 11nm (2019) almost all of those yellows turn to red, meaning no solution pathway has been identified.


    Like metrology, wafer contamination has many crossovers in other areas of semiconductor manufacturing: emerging materials, front-end processes, litho, interconnects, EHS, and metrology, explained Christopher Long, senior engineering and program manager at IBM Research, summarizing efforts within the ITRS' Yield Enhancement technology working group (TWG). The tightest cleanroom requirement by ISO standards (Class 1) is fewer than ten 100nm particles per cubic meter (Class 2 is ≤100 particles) -- but that still leaves a window of tons of particles "which are potential killers," he noted. And not everyone is at ISO Class 1, or even feels they need to be -- resigned, Long quipped, to "solve no disaster before its time."

    Sub-100nm (ultrafine/nano) particles are not measurable with optical particle counters, instead requiring condensation nucleus counters, Long noted. Another big challenge: quantifying and characterizing nanoparticles and their generation sources in the wafer environment (e.g. outgassing). Monitoring and identifying yield-crimping defects and process issues at the wafer edge/bevel also shows promise, particularly in the wafer "E" region.

    Fab issues related to airborne molecular contamination (AMC) are well-documented, and IDMs' key challenge is to figure out what level to control to (without overkill), and do it rapidly (i.e. not weeks). The ITRS is resolved to try to not "overspec the values" and instead reset with numbers "a little more based in reality" i.e. low-PPB (parts/billion) instead of PPT (parts/trillion). Also there needs to be a better understanding of how and why some particles stick/agglomerate and why others don't, and what this tendency means to the rest of the surrounding environment.

    Other areas the TWG is getting its arms around: Ultrapure water (better understanding of particle measurement capabilities ≤65nm, impacts/spec levels for critical organics); liquid chemicals (which ones are and are not harmful to the process); and precursors (understanding and control, coordinated with SEMI Precursor task force and other TWGs for FEP and Interconnect). Wafer static charge/electrostatic discharge due to particles/ionization also is of interest, as it can lead to ESD damage and process interruptions, what Long called a "ghost in the tool."

    Assume critical defect size (CDS) 11.3nm, 1/x3 defect size distribution. (Left) For 2016/22.5nm node, # of particles scaled to CDS: Class 1 = 7831, Class 2 = 783. (Right) For 2021/12.6nm node, # of particles scaled to CDS: Class 1 = ~25,000, Class 2 = 2520.

    Bryan Rice, SEMATECH director of lithography, was quick to point out that the ITRS is essentially just a rallying call to bring disparate groups of suppliers to a common ground, and is subject to politics and academic consideration. It can't be called "wrong" on "failing" to hit some timeline points, but rather pushouts are just poor forecasting; he admonished working groups to be held responsible for more accurate estimates and better harmonizing industry efforts. It seems accountability is the key -- if the ITRS is wrong, well, nobody "loses," he said -- but if ASML's EUV roadmap is wrong, they'll lose billions of dollars! (During the Q&A, Bill Tobey noted that to its credit "ASML solved lots of unsolvable problems" on its own; Rice countered that the challenges facing EUV are too much for one company alone, and ASML stayed out of the game until it had five customers for preproduction.)

    Identifying/managing defects in EUV lithography is "massively" behind, Rice noted, partly because there's no money to be made (SEMATECH is funding AIMS blank inspection efforts). "We need to create a business solution before there can be a technical solution," he said. The industry needs imaging and chemical characterization of ≤0nm defects ("we can't TEM every defect"), and new technologies to clean them. From a materials standpoint, we're "a long way off" with linewidth roughness, with possible novel solutions in rinse and etch chemistry.

    Meanwhile, the current EUV-postponing alternative, 193nm immersion with multipatterning, still needs a fast mask writer, improved LWR, thin resists for better aspect ratio, better etch resistance resists, and brighter sources to support slower resists. A brighter 8 W/mm2/sr source for mask metrology is available, but 100 W/mm2/sr is needed ASAP, Rice said. (Speaking of oft-maligned source power, that needs to improve by a factor of ten within the current calendar year to 100W, and then to 250W for a volume-supporting 125WPH throughput.)


    Greg Smith of Teradyne noted how his company (and the backend in general) must balance the technology/ITRS requirements with what the customer base needs. New processes and technologies such as through-silicon vias (TSV) offer multitude advantages, but figuring out how to work with them isn't easy, he noted; they have complex assembly steps and "new classes of faults that we're not familiar with." How does one test for these new types of faults, which can come from the TSV itself (e.g. voids and oxide pinholes), from bonding (e.g. misalignment and height variation), or from wafer thinning (I-V degradation)? How to contact devices for tests, can it be done before assembly? "Current tools are not equipped to do lots of this." Smith mentioned a new test design with a very high angle of attack and large z-axis movement (the chuck moves down, then over, then up again) to get all the way down into those tall shallow structures. And to avoid testing every TSV, one could test each stack as if it was in an application (e.g. making a phone call) to determine quality.

    Another concern about TSVs, pointed out Diebold during the Q&A, is a need for standardization; chips from different suppliers can have TSVs in different locations depending on the type of device (e.g. memory), so connecting these different chips is a problem. Smith added that vendors tend to view yield data as proprietary, while sharing it could help greatly improve challenges in wafer contamination or yields.

    Can we judge whether one area has a tougher road(map) to navigate? Are the challenges faced and met by metrology the most crucial in several areas? How about contamination control? What of lithography, the industry's workhorse and target of much metrology focus? And what about the backend, which needs to find the balance with device structures coming down the manufacturing line, its own innovations, and customer requirements?

    Who do you think has the toughest path ahead, and the best chance to get through it successfully?

    Editor's notes from MRS Spring Meeting: Symposium C

    April 27, 2011 12:49 AM by ElectroIQ
    Veronica Bermudez of NEXCIS presented paper #C1.9 (“In-line quality control of chacolpyrite-based solar cells by advance Raman spectroscopy”). The work was driven by the fact that CIGS’ competitiveness is compromised by relatively low efficiencies achieved at the module level (9-13%). The presence of inhomogeneities that degrade the optoelectronic properties of the layers is the culprit. The researchers wanted to determine the presence of such inhomogeneities at an early stage in the fabrication process and Raman spectroscopy is well-suited for the application – specifically, use of quasi-resonant Raman scattering measurements. Bermudez said that Raman measurements at quasi-resonant conditions are a fast and sensitive tool for assessing alloy composition.

    Yanyan Cao of DuPont presented paper #C2.2 (“Cu2ZnSn(S,Se)4 thin film solar cells from binary and ternary chalcogenide nanoparticles”). One reason researchers are interested in CZTS for solar PV applications is because it comprises earth-abundant elements/compounds – a definite cost consideration. Cost considerations also come into play by the choice of using nanoparticles; because they are dispersable in various solvents, they enable multiple low-cost coating techniques such as R2R processing on flexible substrates.

    In the coming days, watch for podcast interviews with Daniel Josell of NIST and Fred Seymour of PrimeStar Solar.

    (Debra Vogler)

    AMD: The good old days of fabs & servers

    April 26, 2011 9:22 AM by ElectroIQ
    AMD's 1Q11 sales were in line with estimates and sees 2Q a bit better, but while longtime rival Intel shone in its 1Q11 breakout, AMD still is weighed down by chip price declines and share losses. Credit Suisse's John Pitzer compares AMD's latest results (1Q11) vs. five years ago (1Q06) judging that sales haven't increased much ($1.6B vs. $1.3B), and margins are noticeably lower (GM 44.6% vs. 58.5%, OM 5.7% vs. 19.4%) as is EPS ($0.08 vs. $0.37).

    But the biggest concern is AMD's share of the server market has evaporated, from 22% down to 7% (and its PC share is down a few notches to 18%), points out Pitzer. "The lesson: Owning server market share is more important than not owning a fab," he writes.

    True, fabless AMD no longer has the hassles associated with funding next-gen process technologies and new fab capacity, nor the same debt/interest/legal issues, points out FBR Research's Craig Berger. But he agrees that AMD has a big problem in server share, he's skeptical about AMD's proclaimed ability to ramp 32nm this summer, and questions whether partner GlobalFoundries will be properly motivated to push hard on 22nm :
    [S]ome investors may get excited that AMD's 32nm Llano Fusion processors are now shipping, that AMD is profitable even though it only has 6% market share in server chips, that 2H11 seasonality should improve, and that possible market share gains could drive meaningful leverage in the model[.]

    [W]e, on the other hand, continue to see AMD serving a niche market not occupied by Intel, with Intel's massive process leadership and R&D investment scale continuing to hamper AMD's ability to get any real traction over time. [...] AMD appears to us as having a lack of strategy and leadership, given that 32nm production yield visibility remains low, and given that Intel's much-improved Sandy Bridge HD Graphics 3000 could potentially address more of the consumer notebook market for discrete GPUs, thus possibly hitting discrete GPU attach rates.

    The board's unexpected CEO dismissal leaves AMD without a clear leader or strategy at a very important time for AMD as it ramps integrated APU Fusion processors. [...] [W]e await the hiring of a big-name outsider, and hope that AMD does not become the umpteenth chip firm to target the tablet market with a "me too" ARM-based processor that drains AMD of the vital resources it needs to compete against Intel.
    Berger also takes a stab at the impact of tablets on PC usage, calculating that 2.5 tablets sold cannibalize one PC. Assuming 2011 projections from Apple (35M-40M tablets) and new entrants (20M-30M), as many as 70M tablets could ship in 2011, and thus ~25M PCs cannibalized. Given a 375M PC unit base, that could shave a precious -6% or -8% off PC unit growth rates, he says.

    Analyzing Intel's capex boost, PC disconnect

    April 22, 2011 11:10 AM by ElectroIQ
    Two key takeaways from Intel's 1Q11 blowout financial performance and execs' comments in the follow-up conference call are resonating across the industry: why bearish analysts were so far off on PC demand, and why Intel is already hiking up its 2011 capex.

    Trust our market visibility, not theirs. Despite analysts' assertions and concerns over perceived sluggishness in PC demand , Intel saw 17% Y/Y growth (12% Q/Q) in its PC client business. It may not have direct inroads into chips for mobile/tablet devices, but those devices rely greatly on connectivity, which means accessing backend/server systems, where Intel does have solid business. And as far as the PC market, Intel's Paul Otellini didn't mince words:
    Like many of you, I noted that some of the third-party research firms issued reduced forecasts for PCs in 2011. I want to be clear that our views differ from some of theirs. The PC business has evolved into a global industry that is approaching 400 million units this year.

    While some channels like PCs sold through consumer retail outlets and mature markets have deep visibility, other channels, especially in emerging markets, are not well reflected in the forecast of third-party firms until shipments from Intel and its competitors have been reconciled.

    Over the last 5 years, we have put considerable effort into improving our visibility with systems like just-in-time inventory hubs for our major customers, as well as realtime metrics to monitor sales through all of our worldwide channels. As a result, we were able to call the inflection in our business in Q1 of '09, as well as predicting 2010 growth to within 1 point of accuracy.

    Our projections for PC segment growth in 2011 remain in the low double-digit range based on early sell-through strength we are seeing as we begin 2011 and the great reception to Sandy Bridge in both Consumer and Enterprise segments. And while it's too early to call 2012 with an improving global economy, we see no reason for growth to be materially different from what we see in 2011.

    Mea culpa, admitted a few analysts. FBR Research's Craig Berger upgraded INTC to "outperform" from "market perform," acknowledging that while PC checks have been weak, "investors (including us) have been overly bearish on Intel," "PCs and tablets/smartphones can co-exist and PC units can still grow," and "more time [needs to] be spent assessing the smartphone/tablet cannibalization impacts on PC growth."

    Deutsche Bank's Ross Seymore noted that the disconnect between market analysts and Intel's results is largely explained by "Intel-specific drivers" including emerging markets, Sandy Bridge adoption (and overworries about chipset glitches), and pricing. "The Street (GLCH included) missed the magnitude of burn through 3Q10 and 4Q10 in the channel ahead of Sandy Bridge launch," which led to undershipments for 2010 PC demand, added Gleacher's Doug Freedman. Also a contributing factor: an extra week (14th) of revenue in the quarter.

    Better performance needs better silicon. Three months after mapping out a $9B (±$300M) capex plan for 2011 , Intel has now raised that ceiling to $10.2B (±$400M), citing a need to support 22nm and 14nm (both production and R&D). Intel says it spent $2.72B of that in 1Q11 alone (up 46% Q/Q). "We think that Intel has placed orders for equipment deliveries through mid-3Q, and we think there should be continued Intel orders in 2Q/3Q to ensure the company spends its capex," writes Credit Suisse's Satya Kumar.

    Explained Intel CFO Stacy Smith during the conference call Q&A:
    Probably the biggest single chunk that's happening inside of this increase in CapEx is the fact that we've made the decision that for the development fab for 14 nanometer, we're going to make that fab bigger. That gives us the ability to actually, at the early stage of the ramp, move more products to 14 nanometer, take advantage of that process technology leadership, ramp it faster. So we're going to spend some construction dollars today to have that capability in place of 14 nanometer. But over the 14-nanometer life, it should save us money by going faster on that first factory.
    What Intel is seeing earlier than anyone is the effect of rising capital intensity, argues Kumar. "The rest of logic is only spending on 28/46nm," he notes, and should start feeling the higher capital intensity pressure next year. Recent pushouts by Samsung and TSMC are not an industrywide weakness trend, he says. Barclays' CJ Muse echoes what Intel execs said in the call: that the needs of emerging mobile devices (notebooks, tablets, phones) require more platform features integrated into the processor, meaning more leading-edge silicon capability for power management and performance in smaller formfactors.

    Of course rising capital intensity is good for equipment suppliers, and those with best visibility to new business from Intel (particularly R&D) include ASML and KLAC, Kumar says (adding that LRCX has no Intel exposure). Others, like UBS' Stephen Chin , see others taking advantage, including NVLS and VSEA. Muse adds CYMI, ASMI, and TEL to the list as well.

    Intel's capex boost also means overall 2011 industry capex should grow 20% (vs. 15%), notes Muse, with "aggressive spend still on bricks and mortar," and WFE spending loaded into 2H11. Intel's WFE spending also should stay strong in 2012, he notes.

    One area Intel isn't really concerned about is foundry. Intel reportedly fabbed a 22nm chip for FPGA maker Achronix, and "we are interested in talking to some very specialized companies in terms of doing foundry things," Smith said, but "we are not building a broad-based foundry business and it's not driving our CapEx number."

    CA's 33% renewables target: Promise or paper tiger?

    April 13, 2011 3:10 PM by ElectroIQ
    California Gov. Jerry Brown has signed a new bill that hikes up the state's commitment to 33% renewable energy of overall use, up from 20%.

    Bill "SBX1 2" revises some terms within the state's Renewable Energy Resources Program, signed as an executive order in 2009 by then-Gov. Arnold Schwarzenegger. But the bottom line: The new target for renewable energy usage by 2020 is fully one-third, up from 20%.

    In a statement , the Governor said the increased threshold would stimulate investment in green technologies, create "tens of thousands of new jobs," and promote energy independence. But making 33% of the state's energy overall portfolio come from renewable sources -- the highest in the nation -- "is really just a starting point, a floor, not a ceiling," he said, suggesting that as prices drop and more RE sources come online, 40% "at reasonable cost is well within our grasp in the near future."

    The measure, announced at a SunPower-Flextronics plant dedication , is supported within the renewables sector and by major power producer SoCal Edison , which is already close to the current 20% benchmark. But it's not without controversy; some suggest that residents' utility bills will spike greatly .

    What do you think? Is this a significant stake-in-the-ground for renewable energy adoption, a catalyst for industry and jobs that paves the way for others to follow? Or is it a partisan paper tiger that will cause more financial problems than the ones it aims to solve: power generation/availability, environmental concerns, and eventually cost/W?

    AMD's carrot for GloFo, patience for CEO

    April 6, 2011 1:17 PM by ElectroIQ
    AMD has revised its wafer supply agreement with Globalfoundries, apparently to help light a fire under the foundry to keep its leading-edge process technology up to snuff -- but perhaps there's another reason.

    The two firms' original WFA signed in 2009 involved a "cost-plus" payment plan (fixed regardless of utilization or yields). The amended one changes those terms for 2011 to fixed prices for 45nm wafers, but based on "good die" for 32nm wafers. AMD anticipates payments to GF will total $1.1B-$1.5B in 2011 (vs. $1.2B in 2010). The "cost-plus" terms will revert again in 2012, bumping up AMD's annual payments to $1.5B-$1.9B, with bonuses if GF meets goals for 32nm capacity.

    In a post-PR presentation , AMD execs acknowledged that the changing terms are in response to what were "challenges relating to 32nm yield ramp at GF" (which caused a chip-launch shuffle) but that those yields are now "in-line with our expectations." (Now those the terms just offer a bit more of a carrot for GF to keep its 32nm yields up.) Other reasons for the change were to tighten pricing options and provide better cost visibility for its 32nm ramp.

    In addition to yield insurance, AMD also pledges to give GF a little extra in 2012 if 32nm capacity benchmarks are met -- so this rearrangement of pricing terms is not just about making up for past slipups, but rewarding future availability.

    Ultimately there could be a higher goal here -- all this talk about 32nm yield and incentives is really just a way to smooth out the company's margins over the next year or two, concludes Charlie Demerjian at SemiAccurate . John Pitzer with Credit Suisse notes that AMD's gross margins are basically unchanged at 4%-48%, but sees long-term targets rising to 50% due to decreasing cost/die and favorable mix.

    Meanwhile, AMD's search for a new CEO "seems stalled," says MarketWatch's Therese Poletti . Why? It's a unique exec and personality who'd be willing to square up to longtime dominant rival Intel, plus emerging fabless heavyweights Nvidia and Qualcomm as well as ARM, notes Raymond James analyst Hans Mosesmann. Both AMD and Intel are still weighted heavily to PCs (currently a slumping sector ), and largely criticized for (so far) missing the boat to mobile devices, smartphones, and tablets and new Apple and Google devices utilize ARM's architecture, a battle front for both chip companies. Look for clarity (or at least investor inquiries) at AMD's quarterly earnings call in a couple of weeks. Mosesmann speculates that the matchmaking efforts have "been tougher than [...] they thought," but that it's still too soon to judge. "You don't want them to rush," he notes.

    Calling all photographers/moviemakers: Nikon Small World Photomicrography competition

    April 5, 2011 9:08 AM by ElectroIQ
    I know there are a lot of photographers and movie makers in our ElectroIQ audience. Nikon's 37th annual Nkon Small World Photomicrography Competition is accepting movies (new this year) or digital time-lapse photography taken through the microscope. The new moviemaking category will be judged separately. The call for entries deadline for both images and movies is April 30, 2011. Rules and entry forms are at http://www.nikonsmallworld.com. Good luck and have fun! (Debra Vogler)

    Demands on the Cloud, data center; Wally Rhines' 3D IC roadmap

    April 1, 2011 12:20 AM by ElectroIQ
    Sharon Holt, SVP/GM, Semiconductor Business Group at Rambus, cited some interesting information during her presentation at the GSA Memory Conference (3/31/11, San Jose, CA). For example: the cost of a 22nm logic IC design is >$140M – for each new design. And from Cisco’s Global Mobile Data Traffic Forecast update – Holt presented the following data for consideration on the demands on the Cloud: 1) In 2010, global mobile data traffic was up 159%; 2) smart phones are 13% of the global installed base, yet drive 78% of the total traffic; 3) so far, video represents >50% of all mobile traffic in 2011; 4) and the average tablet traffic is 5X that of smart phones, which are 24X that of feature phones. Watch for my upcoming podcast interview with Holt on the search for a unified memory solution (i.e., one that works for PCs/servers, and for smart phones/tablets).


    And in his presentation at the GSA Memory Conference, Jim Elliot, VP, Memory Marketing & Product Planning at Samsung Semiconductor, tackled the power consumption challenges of the data center. He said a Web 3.0 impact on traffic load study indicates that by 2015, 1266PB of memory will be required by data centers. 1PB = 13.3 years of HD video. And data center power consumption is growing. Elliot noted that data centers account for 23% of global ICT power consumption (about 1% of total worldwide power) and growing. SSDs can help address the challenge because of course, they have no moving parts, thus, use less power. “One SSD can replace up to 20 15k HDDs,” said Elliot. “An SSD outperforms an HDD by 47X in IOPS.” (Debra Vogler)


    The 3D IC roadmap according to Mentor Graphics
    Wally Rhines, chairman & CEO of Mentor Graphics, outlined what he considers to be a realistic 3D IC roadmap at the GSA Memory Conference (3/31/11, San Jose, CA). Today, there are sensors on logic, limited volume stacked memories, and PoP and flip-chip memories on processors. In the next 2-3 years, the technology will move to what Rhines calls 2.5D+. It comprises a rapidly increasing use of interposers, the integration of logic and memory with flip-chip and interposers, and mixed analog, RF, logic and memory in multi-die stacks, and TSVs outside the active circuitry. In 5 or more years from now, Rhines sees the industry at full 3D with embedded TSVs in leading edge logic chips. (Debra Vogler)

    Synopsys: head in the Cloud, feet firmly planted

    March 28, 2011 5:56 PM by ElectroIQ
    Synopsys’ (Nasdaq: SNPS) chairman & CEO, Aart de Geus, told attendees of the company’s annual SNUG (Synopsys Users Group) event (3/28/11, Santa Clara, CA) that using cloud computing to provide surge capacity for modeling/simulation activities by its customers is an opportunity to evolve the EDA business model. To that end, the company has an agreement with Amazon to provide the service – essentially, the ability for a user to request compute power by the hour when such a “surge” is needed to meet time-to-market goals. It was further noted that the security of such a service must be extraordinary, i.e., military-grade. SPICE modeling will also be targeted for surge capacity on the cloud. De Geus also took the opportunity to reiterate his view of semi-economics: where “smart everything” results not only in systemic value creation, but also systemic complexity. To keep up with such complexity, De Geus said accelerating software development with prototypes will be the actionable/executable specification of the future. Prototyping can be either virtual or FPGA-based. The reality of managing systemic complexity includes R&D expenses, collaborations, and acquisitions. Synopsys fully participates in all three. For example, the company currently spends over 30% of its revenue on R&D, and recent acquisitions (e.g., Optical Research Associates, Virage Logic, CoWare, Synfora, VaST Systems Technology) will continue to be an important part of the company’s strategy as software/IP/simulation/modeling are key to moving forward. Perhaps no truer to a practical, pragmatic business philosophy is de Geus’ comment that when dealing with Wall Street, “don’t over promise – over execute.” (Debra Vogler)

    "Refresher" on abstract and article submissions

    March 22, 2011 5:47 PM by ElectroIQ
    To all interested authors for Solid State Technology, Advanced Packaging, Photovoltaics World, and Small Times magazines: we are always looking for solid technical feature-length articles as well as column-length pieces for both print and online publication.

    If you have an article idea, please submit an abstract (1-2 paragraphs should suffice) to debrav@pennwell.com . I will get back to you with the best article placement plan (print or online) as well as the length constraints. Thank you. (DV)

    WaferNEWS Watch: Test tango changes tempo, VRGY chooses ATE over LTXC

    March 22, 2011 4:18 PM by ElectroIQ
    The apparent lack of movement in the battle for Verigy's (VRGY) hand in marriage appears to have a victor: the company has "unanimously determined" that Advantest's (ATE) bid of $15/share in cash -- roughly a $900M valuation, note the Wall Street Journal and Nikkei daily -- is "a superior offer" than that of original suitor LTC Credence (LTXC). VRGY is still playing it coy, though, leaving the door ajar until March 25 in case LTXC counters with a sweetened offer "that would cause the Advantest proposal to cease to constitute a 'Superior Offer.'" (At this writing, 3/22/2011 at 10:45am: VRGY stock is up about 11% to $14.14; ATE is up a 6.5% to $17.68; LTXC is down about 4.3% to $8.09.)

    But don't hold your breath for a LTXC rebuttal, thinks Satya Kumar from Credit Suisse. Among its options, the company most likely will choose to terminate the deal (and pocket a $15M breakup fee) and let VRGY+ATE sort out any DoJ antitrust problems, while it refocuses on its own business, he writes. The other options are less attractive: come back with a better offer, or take its case straight to VRGY shareholders, who probably won't be too receptive since the original terms (a 0.96:1 stock swap) are now dilutive at current share prices, and VRGY's board is publicly backing the ATE offer. In a terse PR, LTXC said it would explore its options, but with "the express purpose of preserving shareholder value."

    So what's next for a VRGY+ATE combination? ATE already sent a note to the DoJ in January, with a second notice received by both companies in mid-February, from which point they had 60 days to respond, explains Kumar. If LTXC does back out, VRGY and ATE can go ahead and respond to the DoJ (until/if not, VRGY is on its own without ATE's help), after which the DoJ has 30 days to approve, request amendments, or enter litigation. "VRGY and Advantest have very little overlap in the markets that they operate in, leading us to believe deal has a high chance of receiving DoJ clearance eventually," he writes.

    Ultimately, he notes, the winner in all of this is: Teradyne, the overall market leader. "We continue to view a possible consolidation of the test equipment space as a significant longer term positive for TER," he writes. In an earlier analysis, CJ Muse from Barclays pointed out that the test market
    has condensed within a decade from a dozen jostling competitors to now just three players with ≥95% market share (two with ≥80%), which makes everyone behave more rationally, which translates to better ASPs and margins.

    News from Japan on the Impact of Disasters

    March 17, 2011 2:16 PM by ElectroIQ
    All thoughts are of Japan and the country’s well-being after a triple disaster on March 11th, with a 9.0 earthquake and tsunami, followed by major nuclear reactor malfunctions. My heart goes out to all my friends and colleagues and their families in Japan, and their collective loss.

    I have been in contact with Takeshi Hattori, president of Hattori Consulting International and an advisory board member for The ConFab, with more than three decades of experience at Sony. He worked around blackouts to file his report at 10:19 pm Tokyo time: “Letter from Japan: Update on infrastructure, fab status after earthquake ”.

    I also contacted a longtime friend and colleague, Kenji Tsuda, who was with Nikkei for 25+ years, launched Nikkei Microdevices, acted as Editor-in-Chief of Semiconductor Internatinoal Japan, and is now Editor-in-Chief of Semiconportal. He (like Hattori-san) is fine although expressed concerns about continued earthquakes (quakes are still felt every day, even in Tokyo), radiation and the status of survivors in the north of Japan. He reported that “Most disaster areas are snowing, where climate is similar to Illinois or Minnesota, colder than in Tokyo. So, they require blankets, oil, gas, and foods. Why they do not have sufficient goods required for life? This is because traffic roads are also damaged with the quakes and huge tsunami. Logistics are not available enough, but now getting better,” he writes.

    Tsuda said the first priority of the logistics is for disaster people, secondly for industry and thirdly for national people. “Tokyo Electric Power Company (TEPCO) estimated this Monday consumption of the power might be 41GW (giga watt) covering the big Tokyo area called Kanto district. Due to power down at Fukushima nuclear power plant, however, the actual power capability was 31GW (almost 10 GW by nuclear energy)."

    TEPCO announced a “rolling blackout” would start from this week. “Many commuter trains stopped and business people are confused, but JR railroad, a major railroad company in Japan has own power generators, and provides almost perfect operation. However, people living in suburbs of Tokyo were obliged to keep in their home, not to work at their office,” Tsuda said. “Yesterday, I came to my office in Tokyo, but people in Tokyo are not so many, (very quiet) and all lighting of buildings is dark to save power as well as subway station and facilities.”

    He said there was plenty of misunderstanding related to nuclear effects. "Today (March 17th) the maximum radiation dose is in the nearest city, Soma City in Fukushima Prefecture, was instantly 200 micro Sv (Sievert), comparable to a flight traveler radiated with space radiation from NY to Tokyo. Usually average natural dose is 0.05 micro Sv, and places 100km far from the nuclear power plants have a few micro Sv, a 100 times larger than daily average, but not enough to damage to our health. This is lower level than radiation level in usual flight travelers." Radiation levels at the damaged nuclear plant are still unknown.

    Tsuda added that, from an industry side, people worry about how long the rolling blackouts will continue. “Power is essential to ramp up their factory operation. Factory damage is being recovered within a month, people say, including Fujitsu, Toshiba and Renesas.”

    Continued good wishes to Japan during this tragic time.

    Pete Singer

    WaferNEWS Watch: SPIE viewpoints

    March 14, 2011 2:52 PM by ElectroIQ
    A pair of Wall Street analysts and a litho exec describe their key takeaways from this year's SPIE Advanced Lithography symposium: How far from HVM are the latest EUV results, how are the competitive source vendors faring, and why some work in improving EUV is falling short.

    Several thrusts can help keep the industry on the Moore's Law path (transistor shrinks via HKMG, FinFETs, and 3D; new materials e.g. Ge-doping and III-V, eventually optical interconnects, and system-level approaches like TSVs). But there's general agreement that EUV provides "the single biggest knob" to tweak for the best cost-reduction roadmap, writes Credit Suisse's Satya Kumar. (While EUV will help chipmakers keep on Moore's Law, the big volume chipmakers see the larger 450mm wafer size as their next opportunity for a big step-down in manufacturing costs. The timing isn't likely to happen until 2016 at the soonest, though.)

    When will EUV be "ready"? Almost certainly not at the 20nm logic node. (Intel's Sam Sivakumar said at SPIE that EUV is also already late for 10nm design rule definition, which is supposed to be frozen by early 2013.) So for now the industry will rely on double-patterning/multipatterning schemes, with the hope that EUV can quickly ramp up its throughputs and be ready for HVM by, say, ~2014-15).

    For EUV there are hurdles to be sure (most notably in source power) but it's no longer a science question of if it will work -- it's "now more of an engineering/technology development project," notes Barclays' CJ Muse. Current specs show improvements: 25nm hp resolution at a customer (18nm at ASML), <0.2% dose stability, 3% CE), but sources are still ~11W usable/filtered, with goals to be ~22W by midyear (~80W lab).

    Source update

    ASML has been the EUV litho flag-bearer, so pushing EUV also means helping ASML succeed, at least initially, which gives the supplier a big headstart on others -- but the race seems to be tightening. Here are the three contenders for sources, with technology pros/cons for each of their approaches:

    Cymer. Cymer's goals for HVM-I: In-band CE 3.0%, 50% collector reflectivity, "clean" power of >100W (200W @ IF). Its current test stats (100hr stress test): >70% source availability, 15W exposure power, 40% duty cycle, >0.3% full wafer dose stability (error stability 4%), 52.1% average area-weighted reflectivity. Two upgrades are coming, starting with a >80W raw power/40W exposure in 1Q11. The next step is HVM-II, which will improve CE from 3.0% to 3.5% (via pulse shaping and prepulse optimization), CE from 5.0sr to 5.5sr (better mirror collection angle), and improving subsystem efficiency (dose control and purity filter).

    Muse's take on CYMI's map? "Overall, it would seem that the program is about 6 months to a year behind, not at all to be unexpected in an undertaking of this magnitude," he writes. "HVM-I success criteria are in no danger of being breached."

    Ushio. Early EUV tools used a Cymer source, but now imec's new preproduction tool has an Ushio DPP source that it says has "considerably higher source power" and a factor-of-20 throughput increase vs. the alpha demo tool. (Kumar points out that German firm Xtreme, whose related technology Ushio acquired, worked with imec and Fraunhofer in early EUV work so their inclusion in the imec tool is not surprising.) The company claims its laser-assisted DPP technology has much better duty cycle (up to 100%) vs. LPP and with much purer spectrum that requires no light filters. The company also says its roadmap matches CYMI for power (100W by mid-2011). In addition to the imec tool, Ushio apparently is also used in Nikon's first EUV tool (vs. CYMI which has shipped four EUV sources already, one reportedly already installed at Samsung).

    Besides imec and Samsung, the other four preproduction EUV litho tools are expected to go to Intel, TSMC, Toshiba, and Hynix, possibly with one of them also using an Ushio/Xtreme source. Gigaphoton plans to have its first source ready for ASML's production-ready 3300 tools, which are planned for initial build later this year and start shipping in 2012, for 2013 debugging at customers and probably volume production sometime in 2014.

    Gigaphoton. Gigaphoton is still on track to ship its first EUV source to ASML in 3Q11, notes Muse. The company updated its LPP source: >100W radiation at IF from a 13kW CO2 driver, though needing basic improvement in duty cycle, CE, debris mitigation, and laser load revealed. CE as high as 3.3% (vs. Cymer's 3.0%) was described in experiments with Sn droplet size (20μm) and droplet preheating with a Nd:YAG laser pulse. Next stage goals by year's end: 5% CE, 75% duty cycle, and 250W @ IF.


    Who's supporting the EUV supporters?

    Among his own summary of the SPIE symposium's EUV updates , Vivek Bakshi, president of EUV Litho, expresses doubt that 100W will be bet before 2012 (after doubling to 40W in 2011), but that's ok since those 100W sources would hit the field around the same time as the 3300 HVM tools.

    Bakshi also lamented the lack of support (i.e. funding) for EUV. For one, there's little research into improving source components beyond the HVM-baseline 100W (e.g. 150W-250W). "With very few exceptions, source research, the very lifeline of EUVL, has essentially been stopped," he writes, noting for example work from Purdue's Ahmed Hassanein in increasing conversion efficiency and reducing debris which has gone largely unfunded, and apparently will soon cease. (On the other hand, research from Gigaphoton's Hakaru Mizoguchi went back to the university drawing board with a 10Hz source to improve CE and eliminate most debris, Bakshi notes.) Little if anything has been shown in scaling DPP beyond 100W -- there is work at the ISAN Institute to scale DPP, but he questions the direction provided by industry beyond that.

    Regarding mask metrology tools (AIMS), Energetiq's source is 8W/mm2 sr (scalable to required 25W/mm2 sr), but the work needs external investment -- the overall source trio aren't really in this game, and while others have shown progress in principle (NanoUV/special design DPP, Adylyte/Sn LPP, Bruker-AIXUV/Sn LPP), it's unclear how or whether these could be developed in time to support mask metrology infrastructure. "EMI funding is not going toward efforts to make sure that the most critical element of the technology is ready in time," Bakshi writes. "This critical technology has to be driven by a consortium, or we’re not going to end up where we want to be."


    Two EUV alternatives

    A poll conducted during one SPIE session showed unanimous choice of EUV as the industry's biggest challenge, and also the most likely risk of failure to be adopted (more than 3D memory, through-silicon vias, or FinFETs), Kumar notes. Though EUV also is clearly the choice over other litho approaches, there remain difficult challenges needing to be resolved.

    Of the non-EUV litho paths, maskless e-beam seems to be favored over nanoimprint across all devices (NIL has favor possibly in DRAM), and among the approaches, work by Mapper and KLAC's "reflective" e-beam (dubbed REBL) appear more promising. Throughput is still an issue, though (<0.1 wafers/hr on a Mapper alpha tool, projected 10WPH on a HVM tool). The logic is whether a cluster of ~10 Mapper tools could hit the 100WPH benchmark for HVM at roughly the same price of an EUV system. Throughput depends on the number of beams and current; with initial systems having 110 beams and only 0.3μA current (HVM needs 13,000 beams and 13μA), Mapper's technology has to make "tremendous progress to be successful," he notes.

    KLA-Tencor, meanwhile, says its REBL system uses microlensing and lenset arrays for a more compact design; benefit is high packing density, but maybe more blur due to columbic interaction between the beams (which cross in the REBL approach, vs. separate in a Mapper system). The company has mentioned planning 1M beamlets for 5WPH throughput, which Kumar calls "intriguing" but doesn't expect any impact for a couple of years.

    All the best to our friends and colleagues in Japan

    March 11, 2011 2:27 AM by ElectroIQ
    The news coming out of Japan after an unprecedented earthquake and resulting tsunami is indeed devastating. Our friends, colleagues, business associates, and their families located in harm's way, are in our thoughts and prayers.

    “Electric” keynote address by Kurt Yeager on transforming the grid for the 21st century

    March 9, 2011 11:56 AM by ElectroIQ
    Speaking at the REW/PVW Conference & Expo (Tampa, FL, 3/8-3/10/11), Kurt Yeager, executive director of the Galvin Electricity Institute, called for a transformation of the nation’s electrical grid. “The obsolescence of our electricity system costs the country $1T/year,” said Yeager. “The average consumer in the U.S. is out of power 4hrs/year.” By comparison, Singapore’s figure is measured in seconds/year.

    To enable the future, Yeager calls for integrating the grids, and diverse generation and storage resources, into a smart self-healing grid. The solution, he noted, calls for intelligent technology, intelligent policy, and empowered consumers. Key to empowered consumers is the smart meter – but it really has to be “smart.” Such meters have to provide data to the consumers, not just the utility company. Yeager referred to a user-centric view that requires the emergence of a synchronous “enernet” – something akin to the internet.

    Yeager defines a smart grid as a transformative network, seamlessly connecting producers and consumers. It also needs price-responsive end-use devices that enable autonomous consumer control (i.e., empowered consumers). Yeager further calls for the nation to look beyond the regulated monopoly business model. “Remove the barriers to competitive retail services,” he said.

    Another component to Yeager’s energy view is converting buildings from "power pigs to power plants." There are so many losses in the conventional industrial building, for example, just due to conversions back and forth between AC and DC he observed. (Debra Vogler)

    What ventures don't get funded?

    March 8, 2011 10:18 AM by ElectroIQ
    In a pre-conference workshop (at the REW/PVW Conference & Expo, Tampa, FL) on renewable energy venture development, instructors Sumesh Arora and Tony Jeff - both of the Mississippi Technology Alliance - told attendees what projects do NOT get funded: ideas, products, hobbies (i.e., if you haven't quit your day job to work on the venture full time, it's a "hobby"), patents, and lifestyle companies or family businesses. The workshop covers risk readiness, growth risks, market risks, established business risks, among other topics. Watch for my podcast interview with Arora and Jeff in the Daily Pulse and/or PV Times later this week. (Debra Vogler)

    Four reasons why LRCX will rebound

    March 7, 2011 2:57 PM by ElectroIQ
    Barclays' CJ Muse understands why Lam Research "has been a relative underperformer" of late, due to its lack of exposure at Intel and unfavorable growth vs. opex. But he's optimistic for a turnaround in the stock, for four reasons:
    • Customer mix improving. Spending by foundries and Intel are likely to be frontend loaded in 2011, so look for memory mix of capex to get better as the year progresses. LRCX has its best customer mix in NAND (65%), so look for better business for Lam vs. more logic/foundry-leveraged rivals KLAC and NVLS.

    • Improving margins for clean. Margins for the company's clean technology were in the low 30% in early 2010, improved to ~39% by year's end, and should top ~45% (maybe up to 47%) by the end of 2011, Muse predicts. Why? The fast market upswing actually made it tough for the company to sell its reengineered spin clean products, but this should change as the market winds die down. Also, the company's nine design wins in 2010 should translate into 3%-5% share gains, and there are higher volumes for clean.

    • Market share gains coming. The company's increased opex outlook (~$100M) in the January quarter soured investors, but there's a longer-term ROI reasoning behind it -- Muse says it'll be for building infrastructure to help support imminent growth in etch and clean. Nearly two-thirds of the increased spend is for etch R&D to drive innovation for top customers, he notes, which is a longer-term "good investment;" ~20% is for new work for clean, particularly the re-engineered chamber configuration (medium-term investment); and ~15% is for 450mm, mainly to woo Intel (longer-term) even if it ultimately dents capital intensity. "Add it all up, and we see these investments as an effort to drive the next 5-10 points of share gains in both etch and clean over the next cycle or two," he writes.

    • Multipatterning litho schemes driving etch. After prolonged tinkering with multiple patterning (double and more) litho schemes, the industry should finally start truly adopting this technology in 2H11 and 2012. To this end, look for etch to increase as a percentage of wafer fab equipment spending, Muse notes.
    Taking all into consideration, LRCX is trading at a discount "to all of its front-end equipment peers," Muse suggests. He expects a likely March earnings trough followed by consistently ratcheting estimates, and currently pegs a $66 stock price target (11× CY11 EPS estimates), meaning he projects roughly 13% upside.

    SPIE Advanced Lithography Conference podcast round-up

    March 5, 2011 10:46 AM by ElectroIQ
    We have already begun posting podcast interviews that took place at the SPIE Advanced Lithography Conference. Watch for them to appear on our podcast page...you'll hear interviews with technical experts at Applied Materials/Magma Design Automation, Brewer Science, Cymer, D2S/e-Beam Initiative, Gigaphoton, IMEC, KLA-Tencor, Multibeam, Synopsys, and Toppan Photomasks. (DV)

    On deck: REW/PVW Conference & Expo

    March 4, 2011 9:37 AM by ElectroIQ
    Editors from Photovoltaics World will join their colleagues from Renewable Energy World and renewableenergyworld.com next week in Tampa, FL for the REW/PVW Conference & Expo. I'll (DV) be doing video interviews and podcast interviews at the event - if you're attending and want to comment on an interesting panel discussion or "hot" topic at the show, contact me via email (debrav@pennwell.com) and hopefully, we can schedule a time at the event, or else via phone after the event. (DV)

    SPIE Advanced Litho Conference podcast "watch"

    March 4, 2011 9:32 AM by ElectroIQ
    Watch for podcast coverage of the following companies reporting from the SPIE Advanced Lithography Conference: Cymer, Applied Materials, Gigaphoton, Toppan Photomasks, Imec, D2S, Synopsys, Multibeam, and a special interview with Dr. Terry Brewer - who is celebrating Brewer Science's 30th anniversary. The best way to catch our podcasts is to subscribe to the Daily Pulse e-newsletter and/or WaferNEWS. (DV)

    WaferNEWS Watch: FORM shaping up; an AMAT mea culpa

    February 28, 2011 3:25 PM by ElectroIQ
    One market analyst says probe card vendor FormFactor is "back on track" to retake market share in DRAM test. And another analyst wants a do-over for his previous bearish stance on AMAT.

    FORM shaping up

    FormFactor (FORM) has had its fits and starts in recent quarters, and some have even called for it to get busy trimming, and/or get busy selling . (One of our readers, meanwhile, believing this a far too simplistic synopsis , points out that not only did the company recognize the need to trim manufacturing , but its fab ops issues are more complex, concerning improper utilization and burn rates.)

    But where there's a trough, there's a coming upswing, and chance to rebalance the playing field. Citing FORM's talk at his outfit's recent tech conference, Patrick Ho of Stifel Nicolaus feels the company is "back on track" with its operating model, as long as it can win back share in DRAM, and longer-term could push into NAND flash and system-on-chip designs. Initial quarters under new CEO (and former AMAT exec) Thomas St. Dennis have had "some hiccups," he notes, but 1H11 could spell the bottom for the company.

    AMAT mulligan?

    On the heels of strong Applied Materials' (AMAT) fiscal 1Q11 numbers, particularly in solar , we've got a Mea Culpa sighting: Piper Jaffray's Gus Richard says he shouldn't have downgraded AMAT back in July when it was deep-sixing its thin-film solar biz . In fact, estimates for 2011 and 2012 are too low, he now says, with backlogs well in excess of $3B and even approaching $4B by year's end.

    Key to overall performance, though, is the company's bread-and-butter biz of tools for advanced semiconductor manufacturing, and here the shift to 28nm manufacturing will be the proving ground. "We believe yields at 28nm are going to be challenging as older gate stacks do not offer sufficient process latitude, high-k /metal gate processes are not mature at 28nm, and foundries move to double patterning is likely to be challenging as well," he writes. A rocky 28nm node transition will mean adding more wafer capacity, which actually is good news for suppliers -- and AMAT in particular, as the 800lb gorilla.

    Dr. Burn Lin of TSMC compares EUV and MEB

    February 27, 2011 11:44 PM by ElectroIQ
    Dr. Burn Lin, VP of TSMC, was the keynote speaker at KLA-Tencor's annual Litho Users' Group forum. Among the topics he covered was a comparison between multi-ebeam and EUV lithography for future nodes. Lin first noted that economics will drive the decision at the 16nm node - whether to use EUVL or MEB ML2. However, at 8nm, EUVL has better resolution, MEEF, DOF, and overlay margin, while MEB has the potential for better CDU and OL accuracy.


    EUV needs more source power to compensate for throughput loss per node, which breaks down as follows: a 2x loss due to shot noise, and a 2x loss due to the need for more mirrors at higher NA lithography. MEB needs either more parallelism or source brightness to compensate for its throughput losses per advancing node; MEB's throughput losses per node break down like this: MEB's problems are due to a 2x loss because of the huge volume of data generated by the process (e.g., the data rate is >7.5Gbps/beam - in the MAPPER tool, for example, a single electron source is split into 13,000 Gaussian beams), and there is a 2x loss due to shot noise.


    The last two points are probably obvious: EUVL has a high cost and MEB is less developed as a technology. (DV)

    Editorial coverage at SPIE Advanced Lithography

    February 25, 2011 3:22 PM by ElectroIQ
    I'll (Debra Vogler) be doing podcast interviews at the SPIE Advanced Lithography conference next week. You'll see them all in the Daily Pulse!

    Podcast coverage at Strategies in Light

    February 25, 2011 3:11 PM by ElectroIQ
    Coverage at the Strategies in Light conference includes podcast interviews I (Debra Vogler, senior technical editor) did with Chris Moore/Semilab AMS, Jeff Desroches/ATMI, Mike Plisinski/Rudolph, Ravi Kanjolia/SAFC Hitech, and Thomas Uhrmann/EVG. Some have already been posted - you can hear Jeff Desroches' interview at http://tinyurl.com/5w9cg2o . Additional podcasts are at http://www.electroiq.com/index/Semiconductors/sst-podcasts.html

    WaferNEWS Watch: 450mm is coming, but after EUV and TSVs

    February 24, 2011 2:20 PM by ElectroIQ
    Barclays analyst CJ Muse updates his views on a 450mm wafer-size transition, following TSMC's stated switchover plans. His take: 450mm will happen by or before 2018, but other key chip manufacturing transitions will have to come first -- namely through-silicon vias (TSV) and EUV lithography.

    After an initial push by the self-appointed 450mm Big 3 (Intel, Samsung, TSMC ) asking for a 2012 pilot line, things quieted down (at least publicly) due in part to vociferous reception from suppliers, and then the global and industry downturns. Now, with recent news of Intel's forthcoming 450mm-capable D1X facility in Oregon and its planned new AZ fab (also 450mm capable), and TSMC's stated 450mm schedule (pilot line in 2015-2016, ramping production in 2015-2016), industry chatter about 450mm has "begun to percolate" again, he notes. Equipment makers, long resistant to the idea of 450mm, have started commenting publicly to the eventuality of a transition. (The 300mm wafer-size upgrade increased processing surface area by 2.25x, but they only could get roughly 40% more for 300mm tools, Muse points out.)

    But capital intensity for leading-edge semiconductor manufacturing is on the rise, and there are more pressing transitions that will need to be addressed first, he says. First, expand use of through-silicon vias (TSV). Then, incorporate EUV lithography for finer features where immersion (and its associated tweaks) can no longer go, presumably sometime soon after 20nm. And being third-fiddle to TSV and EUV will actually help 450mm's cause, because 450mm will help chipmakers reduce their rising manufacturing costs, and rising capital intensity translates into more business for tool suppliers so they'll have a better economic foothold for the R&D.

    "We will likely see a chicken and egg game, but we do expect chipmakers to help support the tool development efforts with equipment companies, at the same time, sharing some of the higher dollars received in the current golden era of capital intensity," Muse writes. His back-of-the-envelope calculations (a $40B equipment market, 15% R&D spend on it, and a seven-year transition period) suggest tool makers will spend roughly $6B on 450mm, which they "can rather easily come up with," he says, as long as chipmakers add their own funding "in the order of billions" to help the transition.

    Muse also lays odds on who will benefit most, and least, from the 450mm future. Adding more wafer surface area means that beam-tool process steps (i.e. litho, implant, and metrology) will need to be improved to maintain their throughput, so suppliers in these fields should see a boost in capital spending. Areas that won't see much help from 450mm would be in vacuum-based process equipment.

    "The ROI argument still exists for 450mm, as has existed for EUV," Muse sums up. "But if [chipmakers] all want it in no uncertain terms, and are willing put money to make it happen, it will happen."

    LED manufacturing workshop at Strategies in Light

    February 22, 2011 10:14 PM by ElectroIQ
    At a pre-conference workshop (Strategies in Light; 2/22-24/11; Santa Clara, CA), industry experts discussed manufacturing issues and strategies for LEDs. In the coming days, watch for my podcast interviews with workshop presenters Chris Moore/Semilab AMS, Mike Plisinski/Rudolph Technologies, Thomas Uhrmann/EV Group, and Ravi Kanjolia/SAFC Hitech. They'll be posted to www.electroiq.com and featured in the Daily Pulse and WaferNEWS.

    Strategies in Light conference coverage this week

    February 21, 2011 6:57 PM by ElectroIQ
    Just a reminder that Electroiq (i.e., Solid State Technology, Photovoltaics World, Small Times, and Advanced Packaging) editors will be covering the Strategies in Light conference this week (Santa Clara Convention Center).

    Next week - we'll be covering the SPIE Advanced Lithography Conference.

    (DV)

    WaferNEWS Watch: War of the ASPs at Mobile World Congress

    February 18, 2011 1:46 PM by ElectroIQ
    Eyeing the Mobile World Congress through a semiconductor industry lens, Deutsche Bank analyst Ross Seymore sees the battleground of tablets and operating systems shifting from basebands to application processors, and ultimately boiling down to integration and prices.

    Nokia: MeeGo to Windows. Android's growing popularity in smartphones and tablets was in the spotlight at the recent Mobile World Congress, but what created buzz among semiconductor vendors was Nokia's announced shift to Windows from the Intel-backed Linux-based MeeGo platform. "Most chip vendors at MWC were trying to put on a positive spin on this change, but we found a pervasive sense of uncertainty as to the chip procurement implications," writes Seymore in a research note. Perceived winners in this shift: Qualcomm (incumbent in the Windows ecosystem) and possibly Texas Instruments (incumbent at Nokia in basebands). Intel and Broadcom would be potential losers amid the uncertainty surrounding the OS shift, ramp timing, and opex requirements, he speculates.

    War of the app processors. The emergence and user embrace of smart phones and tablets (netbooks, we hardly knew ye!) is shifting the battle of silicon from basebands to application processors, and there's a "core war" brewing among numerous (at least 10) vendors trying to differentiate on how many ARM cores (single, dual, quad-core) and frequencies (1GHz-2.5GHz) they can offer.

    It's all about price and integration. Ultimately, end-users generally don't care about the guts and components of their smartphone or tablet unless it impacts usability. So, inevitably, the key advantage for mobile chip components will be about price, and favor those who can leverage cost-cutting benefits of integration (baseband, connectivity, etc.)

    Room enough for everyone? Bottom line, the markets for smartphones and tablets are probably big enough that there's significant growth potential for chip vendors, but competition will be fierce and even intensify, from basebands to application processors to connectivity. Once handset vendors whittle down their OS choices, look for technical differentiation to give way to pricing pressures, and the winning OEMS will be those who can offer various wireless silicon solutions that can be integrated to lower silicon costs. (Seymore's looking at you, QCOM, BRCM, and MXIM.)

    Strategies in Light conference coverage

    February 17, 2011 12:38 PM by ElectroIQ
    Those of you interested in LED manufacturing issues and strategies will want to attend the Strategies in Light conference next week (2/22-2/24/11, Santa Clara Convention Center; www.strategiesinlight.com). I'll be covering the event and our editor-in-chief, Pete Singer, will be moderating a workshop on Tuesday, 2/22, 8:00AM-noon. I have limited time available in my schedule, but if anyone is interested in doing a podcast (audio-only) interview, please contact me at debrav@pennwell.com to see if arrangements can be made. (Debra Vogler, Sr. Techical Editor)

    WaferNEWS Watch: Advice for MENT and EDA: Fight and pray

    February 14, 2011 10:43 AM by ElectroIQ
    Late last summer Carl Icahn raised his ownership stake in Mentor Graphics achingly close to the 15% threshold trigger of the company's newly enacted "poison pill" amendment, set down just two months earlier in what was viewed as a preemptory response to just such a shareholder maneuver.

    And now we see why: Icahn now says MENT should put itself up for sale , and he's gathering forces for a potential proxy battle, ostensibly at least in part due to the company's sudden acceleration of its shareholders meeting date. "At the very least [Mentor Graphics] should be put up for sale and see what the shareholders want to do with it," he told CNBC . "The company is substantially undervalued versus its peers," added Donald Drapkin of Casablanca Capital , a 5.48% stakeholder that also is suggesting a new slate of board members . "Management's done nothing to promote shareholder value, they've just been just sitting on their hands [...] It's just a sleepy company run like a country club."

    We asked EDA market watcher Gary Smith of Gary Smith EDA what he thought of the situation. Antitrust risks would probably keep EDA rivals Synopsys and Cadence out of the running for M&A, as the fragmented MENT assets would be "far less valuable than the whole," he told SST . A more logical fit would be with a mechanical vendor (e.g. Dassault or PTI), but a true inflection point of system design automation is still years away -- it "probably won't happen until the next decade so the acquisition wouldn't reap benefits for quite a while." From an engineer/user's perspective, acquisition by any other type of firm would mean a breakup of MENT, loss of leadership, perhaps "a slowdown in DFM R&D," and even a sectorwide EDA breakup "as we are seeing in the embedded software design market," Smith thinks.

    His recommendations: "I think Mentor should remain independent so they can carry out their present market strategy without interference." And his advice for all the EDA companies: for MENT, "fight;" for SNPS, "pray"; and CDNS, "pray harder."

    NanoArt 2011 - open to all artists and scientists (18 yrs or older)

    February 11, 2011 10:09 AM by ElectroIQ
    The NanoArt 2011 international online competition was announced today. It's open to all artists and scientists 18 years of age and older. Basically, contestants are given 3 hi-res monochromatic electron scans of nanosculptures. Participants have to alter the provided image(s) in any artistic way to finish the artistic-scientific process and create NanoArt works. Artists and scientists may also use their own images as long as these visualize micro or nanostructures. Go to http://nanoart21.org/html/nanoart_2011.html for more details. (DV)

    WaferNEWS Watch: Popping the MOCVD bubble for LEDs

    February 7, 2011 11:01 AM by ElectroIQ
    Market analysts at our sister organization Strategies Unlimited recently took a look at the rapidly rising sales of MOCVD reactors for LED production, whether it's a true market bubble, and what it means to both sides of the supply chain -- who wins and who loses. Turns out it's a bit more complicated than at first glance.

    "There have never been so many orders in the history of MOCVD," asserts Tom Hausken, director of components practice. For an idea of just how wild & wooly this sector has become, consider:
    • A rumor from last month, that Golden Concord Holdings (Hong Kong) sought to purchase 500 reactors as part of a new $2.5 billion investment in LEDs;
    • Several companies have orders for >100 reactors;
    • There are two primary supplier beneficiaries -- Aixtron and Veeco -- who are "working like crazy" to deliver tools, he says.
    Seems easy to conclude that there's way too many tools in the pipeline. Hausken and S-U peers drew up the following chart to calculate what they believe the world needs to meet near-term LED production (not counting normal excess or competition), vs. what the devicemakers seem to be asking for. (Note that this doesn't include assumptions about what might actually get delivered, accepted, and put into production...)


    Estimated LED MOCVD reactor shipments. (Source: Strategies Unlimited)


    Clearly there is a big mismatch, but the question is -- who stands to win, and who will lose? Hausken reveals all in an article for SST 's sister magazine LEDs Magazine , but suffice to say that there are a lot of winners, from LED end-users (excess capacity means lower prices) to MOCVD reactor vendors (cash windfall). And even China, which is pushing this entire envelope with subsidies, generally comes out ahead due to technology and investment infusions, much like what happened with the nation's solar PV push.

    On the other hand, in the event of an LED glut lower-tier LED suppliers probably will suffer, Hausken notes. And investors "may get stuck with some expensive paperweights."

    WaferNEWS Watch: ATE-VRGY quietly busy?

    January 31, 2011 8:54 AM by ElectroIQ
    It's been a month or so since the drama unfolded around Verigy, LTXC (the fiancée) and Advantest (the 11th-hour suitor). In Nov. 2010 LTXC and Verigy announced a planned merger . In late December Advantest swooped in with its own unsolicited offer whichVRGY at first coyly rejected it, but with language that implied a sweetened offer might be better received. Barclays analyst CJ Muse has suggested VRGY-LTXC is a better strategic fit.

    Today things are unusually quiet, though doubtless there's activity behind the scenes. "We think that Advantest and VRGY are still in merger discussions," writes Satya Kumar from Credit Suisse in a report. Regulatory concerns shouldn't be a problem (the combo would trail TER in marketshare by ~50% to 33%), and tech synergies are there (e.g. cross-selling probe cards and handlers, streamlining product roadmaps). Indeed, Kumar thinks the protracted silence is due to hammering out details in breakup fees and other terms in case the deal can't be closed.

    A S1/A filing could happen in early Feb, with proxy mailings around the same time; Kumar thinks shareholders will lean toward ATE instead of LTXC (though VRGY might continue to press ahead with LTXC if only to get ATE to accept terms and sweeten the deal). The two sides, he believes, are close enough, and the opportunity attractive enough, that ATE is unlikely to make this a hostile bid and appeal directly to shareholders. "We still think there is enough incentive for Advantest to do what it takes to make this deal happen," he writes. "If there is a will, there can be a way."

    WaferNEWS Watch: Semicap 1Q11 preview: Rising tides

    January 26, 2011 4:13 PM by ElectroIQ
    Wall Street analysts handicap this week's field of semicap earnings announcements, and the impact of some big chipmakers recently lifting their 2011 capex ceilings.

    Generally speaking, both CJ Muse (Barclays Capital) and Peter Kim (Deutsche Bank) expect a slightly better-than-thought 4Q10 from several key suppliers reporting their financials this week, as foundries and NAND flash suppliers get an early jump on what likely will be a very busy 2011 for both sectors. Kim sees things at the upper end of guidance ranges, with around -4% sales declines.

    Both analysts also expect 1Q11 to be flattish (or slightly lower than 4Q10), though Kim thinks it'll be better than originally thought as recently hiked 2011 capex budgets would seem to erase a projected midyear capex gap. "Concerns of tool delivery schedules could motivate chipmakers to place longer lead time orders for tools to secure delivery slots)," which could pull in orders into 1Q11, Kim writes. Muse adds that ASML, which has the highest lead times in the SPE sectors, just reported near-term record orders. Look for bookings to climb again in 2Q10 as fabs firm up their ramp-up plans, Kim notes. Indeed, the next week will bear this out as Samsung, Hynix, TSMC, and UMC all report their quarterly results and 2011 capex plans; Kim sees Samsung and Hynix coming in flat or slightly lower in 2011 vs. 2010, while TSMC likely will raise its budgets (UMC is keeping its 2011 capex flat at $1.8B...Kim had been projecting $2.0B). Toshiba might also provide some clarity on its Fab 5 spending plans ahead of its fiscal year-end in March.

    A rundown of their company-by-company expectations:

    Lam Research: Intel's $9B capex surge in 2011 helps competitors and hurts LCRX which has little business there outside of bevel clean -- but this might indirectly help, too, if other chipmakers (e.g. foundries) feel compelled to open their wallets a little more to keep up, points out Kim. Other key accounts with anticipated big 2011 capex investments (Samsung, GlobalFoundries, TSMC) should pick up the slack, too. Muse sees inline C4Q10 revenue/shipments and a flattish C1Q11, with SEZ clean business picking up any slack in etch demand. Much of LRCX's business will be backend-loaded in 2011. "We think that $800+ revenues is definitely sustainable in the 1H of 2011, if not for the whole year," Muse writes. Keep an ear out, though, for any comments (however unlikely) made by LRCX CEO Steve Newberry during the results call regarding overspending or peak spending.

    KLA-Tencor: KLAC has the largest exposure to logic and foundries who are leading the capex charge in 2011, and they generally buy high-end wafer and mask inspection tools, Kim and Muse agree. ASML's record orders also comes into play here, since those masks have to be inspected, Kim points out -- though he thinks some of that reticle inspection business could be split with AMAT, whose Aera 2 is believed to have a foothold at Intel. Muse sees KLAC coming in at C1Q11 guidance of flat/-10% orders, though like others this should quickly pick up in subsequent quarters. Kim also points bullishly at KLAC's new LED production tools, a market that "is quickly becoming large enough to be meaningful" to the company.

    Varian Semi. Equip. Assoc.: This is a clear darling of both analysts; Muse gushes that it's "one of our favorite secular growth stories" (in both semi and solar), and Kim acknowledges that VSEA is the leader in both HC and MC implant, and the sole supplier of PLAD tools (all DRAM for now, but maybe NAND later). That means there's a lot of wind blowing to fill its sails, from 2011 capex projections from Intel, Samsung, and GlobalFoundries to increased penetration of its Solion tool (projected $25M sales in 2011 with possible upside, $100M in 2012, according to Kim). "With capacity expansion spending in full swing [and] our estimates incorporating only ~$50M in new market revenues, we see upside potential to our above-consensus CY11 and CY12 estimates," Muse writes.

    Teradyne: Barclays' Muse expects -21% Q/Q decline in C4Q10 orders to $275M, but hopes to find in TER's results some "confirmation that the March Q is indeed the trough for tester demand." Leading the way back up the slope will be a pickup in NAND test demand, he says.

    Novellus: NVLS is actually lagging in cycle-to-cycle revenue growth, Kim says, but PVD sales are trending higher thanks to marketshare gains in memory. Also, share buy-backs and "disciplined cost control" give it better earnings leverage growth, he adds.

    Applied Materials: Though AMAT reports later than other SCE firms, it's still by far the industry 800-lb gorilla, and it'll get a windfall from Intel's capex splurge (CMP, RTP, epi, PVD, and mask inspection as stated above). But overall, AMAT could see a lag from EES (orders down in F1Q11, with added risk of a growing solar PV market oversupply situation) and FPD businesses (down "moderately" in F1Q11 and flat through F2Q11), Kim says.

    Common Platform alliance to use gate last at 20nm

    January 18, 2011 11:49 PM by ElectroIQ
    At today's Common Platform Tech Forum event (Santa Clara, CA), Dr. Gary Patton, VP, IBM Semiconductor R&D Center, told attendees that the alliance will switch from a gate first approach to gate last at 20nm. He noted that 20nm technology demands different requirements than 28nm. He said both approaches have been evaluated in parallel since 2001 and stated that he is less concerned with the replacement gate process than he is about the other innovations that will be needed at 20nm (e.g., self-aligned contacts, local interconnects, and BEOL pitches).

    The time frame for introduction of 20nm is 1Q2013 for early production. It is anticipated that third generation ArF immersion with double-patterning and source/mask optimization (SMO) will be used at 20nm.

    WaferNEWS Watch: Takeaways from CES

    January 18, 2011 10:39 AM by ElectroIQ
    Scanning products and trends at this year's CES show to get a sense of where the industry's going, Barclays' CJ Muse thinks the emergence of tablets and smartphones not only helps NAND demand overcome DRAM softness, it could signal "a paradigm shift" in the relationship of semiconductor sales and worldwide GDP. And there's a Beta vs. VHS battle brewing in LCDs.

    Moore's Law is alive and well. More people are using and embracing tablets, smartphones, and smart TVs, which change consumers' relationship and interaction with the PC. On the devicemaker side this means greater functionality, smaller formfactors, and reduced power consumption -- all of which mean more high-end silicon. As such devices continue to penetrate into emerging markets, "we could be seeing a paradigm shift in terms of semiconductors contribution to worldwide GDP," he writes. (His supplier picks, with most exposure to node-shrinks and new wafer capacity: ASML, LRCX, VSEA, AMAT. )

    Memory split, but overall strong. Tablets continue to cannibalize netbooks and lower-end notebooks, but surging NAND consumption (likely doubling to 128GB in the next-gen iPad) is only partially offset by decreasing DRAM consumption, so look for higher demand for more memory wafer starts, Muse writes. And this doesn't even factor in the potential for solid-state devices. (His picks: Memory makers, and suppliers with most exposure to them: LRCX, VSEA, TER. )

    Displays: A Beta-vs-VHS battle brewing? No big new splashes in displays at this year's CES, it's all "evolutionary" vs. "revolutionary," Muse says. 3D-TV continues to gain steam, but with weaker forecasts than before (3.5M units in 2010 vs. 5M+, by his count), and "slightly less than 20M units" in 2011.

    And there's a "Beta vs. VHS battle" brewing in this space. LG Display wants to move from active shutter glasses to a passive technology aided by its fill-type patterned retarder (FPR) display, which lowers passive costs by up to 30% and enables use of lower-cost glasses ($1-$2 vs. $100+). Sony and Samsung are sticking (for now) with the active technology. And Toshiba is working on a third option (autostereoscopic) that is glasses-free. With more larger-size displays incorporating 3D technology, this is a battle to watch, Muse points out.

    Muse also was surprised at a lack of OLED TVs at CES; LG had a 31" model (ready in the US later this year) and Sony had a 24.5" one, while Samsung pulled its offering from the floor. It's clear, Muse writes, that OLED's high production cost is limiting its penetration into larger panel sizes, and mass production is (for now) only viable for small-size displays (Gen 4 and 5.5). Samsung hopes to gain first-mover advantage this year with a massive AMOLED capex ramp, he notes.

    For Internet-connected TVs, it's still unclear where the functionality will reside (the TV or set-top box), and also how TV panel/set makers will differentiate themselves.

    Steve Jobs goes on medical leave from Apple

    January 18, 2011 9:19 AM by ElectroIQ
    In an email subsequently released to the media, Steve Jobs informed the Apple team that he will take a medical leave of absence to focus on his health. Jobs will continue as Apple's CEO and be involved in major strategic decisions for the company.

    Tim Cook, chief operating officer, will be responsible for all of Apple’s day to day operations.

    Apple recently made a stir in the photovoltaics sector when it won a patent for a mobile device that derives power from a solar panel in a "plug-and-play" configuration. The patent shows that the solar panel would be removable and could be used to charge the device or batteries/accessories.

    The company also influenced the MEMS microphone sector in 2010 with incorporation of MEMS microphones into the iPhone 4 .

    The PV and MEMS sectors will watch carefully to see how Apple's technology and design decisions are affected with Jobs on this medical leave. The Associated Press reports that Cook spent significant time at IBM before joining Apple, where he has taken the reins twice due to Jobs' medical leaves (2004 and 2009).

    WaferNEWS Watch: Best of 2010

    January 10, 2011 3:48 PM by ElectroIQ
    In a banner year for semiconductor makers and the suppliers who sell chipmaking tools, industry stocks generally did pretty well, up ~22% on average for our WaferNEWS Fab 50 list. Congrats to AXT, which climbed more than 200% for the year; kudos also to Axcelis, which more than doubled its stock in the past year. Heading the other direction were Tegal (languishing most of the year in the $0.50 range) and FormFactor (whose problems and possible solutions have been the subject of speculation ).

    Note that as in every year there were changes and casualties: EGLS, ASYT, AVZA, BESI, and ICOS are no longer on our list. Also, LTX and Credence merged, while Semitool was bought by AMAT.

    Silicon Valley Engineering Council banquet

    January 9, 2011 6:57 PM by ElectroIQ
    If you're in the Silicon Valley area, you might want to check out the Silicon Valley Engineering Council (SVEC) banquet. Register at http://svecbanquet2011.eventbrite.com/

    Dr. Robert Doering featured in January 2011 SST

    January 7, 2011 11:52 AM by ElectroIQ
    Please be sure to check out the cover feature by Dr. Robert Doering of TI in the January issue of Solid State Technology. And thanks to NRI Southwest Academy of Nanoelectronics at the University of Texas at Dallas for the beautiful SEM that graces the issue's cover. (Any comments - please send to debrav@pennwell.com)

    CES will be a staging ground for the new TV remote, brought to you by MEMS

    January 5, 2011 1:34 PM by ElectroIQ
    We'll challenge the inner TV infomercial announcer here.

    Does your arm ache from pointing the remote at the TV? Are you sick of scrolling with endless button clicks just to get to the channel you want? Don't you wish there was a better way?

    At the upcoming Consumer Electronics Show (CES), January 6-9 in Las Vegas, several TV manufacturers are teaming up with micro electromechanical system (MEMS) makers for the new, modern TV remote. LG is using InvenSense's MEMS in its TV remote at CES , as is Universal Electronics . Hillcrest is partnering with Broadcom at CES to showcase the powers of Bluetooth SoC and MEMS integration, all in the name of better TV remotes.

    MEMS in the remote control allow TV viewers to scroll through channels and showtimes more easily. They don't require direct line-of-sight to the box either. This kind of user-synched control is what you experience when playing Nintendo's Wii, which also uses motion control MEMS.

    This might be a good time to brush up on what MEMS are, their uses, and why they fit right in at a cutting-edge electronics show like CES. The acronym is generally pronounced "mems" rather than saying each letter. Get started by reading STMicro's article, Introduction to MEMS gyroscopes , then explore further on the ElectroIQ MEMS center at http://www.electroiq.com/index/mems.html

    This is the point in the infomercial where I'd repeat the phone number to call about 5 times. But hey, if you had a MEMS-enabled remote, you would be able to change the channel pretty quickly!


© 2013. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS