A pair of Wall Street analysts and a litho exec describe their key takeaways from this year's SPIE Advanced Lithography symposium: How far from HVM are the latest EUV results, how are the competitive source vendors faring, and why some work in improving EUV is falling short.
Several thrusts can help keep the industry on the Moore's Law path (transistor shrinks via HKMG, FinFETs, and 3D; new materials e.g. Ge-doping and III-V, eventually optical interconnects, and system-level approaches like TSVs). But there's general agreement that EUV provides "the single biggest knob" to tweak for the best cost-reduction roadmap, writes Credit Suisse's Satya Kumar. (While EUV will help chipmakers keep on Moore's Law, the big volume chipmakers see the larger 450mm wafer size as their next opportunity for a big step-down in manufacturing costs. The timing isn't likely to happen until 2016 at the soonest, though.)
When will EUV be "ready"? Almost certainly not at the 20nm logic node. (Intel's Sam Sivakumar said at SPIE that EUV is also already late for 10nm design rule definition, which is supposed to be frozen by early 2013.) So for now the industry will rely on double-patterning/multipatterning schemes, with the hope that EUV can quickly ramp up its throughputs and be ready for HVM by, say, ~2014-15).
For EUV there are hurdles to be sure (most notably in source power) but it's no longer a science question of if it will work -- it's "now more of an engineering/technology development project," notes Barclays' CJ Muse. Current specs show improvements: 25nm hp resolution at a customer (18nm at ASML), <0.2% dose stability, 3% CE), but sources are still ~11W usable/filtered, with goals to be ~22W by midyear (~80W lab).
ASML has been the EUV litho flag-bearer, so pushing EUV also means helping ASML succeed, at least initially, which gives the supplier a big headstart on others -- but the race seems to be tightening. Here are the three contenders for sources, with technology pros/cons for each of their approaches:
Cymer's goals for HVM-I: In-band CE 3.0%, 50% collector reflectivity, "clean" power of >100W (200W @ IF). Its current test stats (100hr stress test): >70% source availability, 15W exposure power, 40% duty cycle, >0.3% full wafer dose stability (error stability 4%), 52.1% average area-weighted reflectivity. Two upgrades are coming, starting with a >80W raw power/40W exposure in 1Q11. The next step is HVM-II, which will improve CE from 3.0% to 3.5% (via pulse shaping and prepulse optimization), CE from 5.0sr to 5.5sr (better mirror collection angle), and improving subsystem efficiency (dose control and purity filter).
Muse's take on CYMI's map? "Overall, it would seem that the program is about 6 months to a year behind, not at all to be unexpected in an undertaking of this magnitude," he writes. "HVM-I success criteria are in no danger of being breached."
Early EUV tools used a Cymer source, but now imec's new preproduction tool has an Ushio DPP source that it says has "considerably higher source power" and a factor-of-20 throughput increase vs. the alpha demo tool. (Kumar points out that German firm Xtreme, whose related technology Ushio acquired, worked with imec and Fraunhofer in early EUV work so their inclusion in the imec tool is not surprising.) The company claims its laser-assisted DPP technology has much better duty cycle (up to 100%) vs. LPP and with much purer spectrum that requires no light filters. The company also says its roadmap matches CYMI for power (100W by mid-2011). In addition to the imec tool, Ushio apparently is also used in Nikon's first EUV tool (vs. CYMI which has shipped four EUV sources already, one reportedly already installed at Samsung).
Besides imec and Samsung, the other four preproduction EUV litho tools are expected to go to Intel, TSMC, Toshiba, and Hynix, possibly with one of them also using an Ushio/Xtreme source. Gigaphoton plans to have its first source ready for ASML's production-ready 3300 tools, which are planned for initial build later this year and start shipping in 2012, for 2013 debugging at customers and probably volume production sometime in 2014.
Gigaphoton is still on track to ship its first EUV source to ASML in 3Q11, notes Muse. The company updated its LPP source: >100W radiation at IF from a 13kW CO2
driver, though needing basic improvement in duty cycle, CE, debris mitigation, and laser load revealed. CE as high as 3.3% (vs. Cymer's 3.0%) was described in experiments with Sn droplet size (20Î¼m) and droplet preheating with a Nd:YAG laser pulse. Next stage goals by year's end: 5% CE, 75% duty cycle, and 250W @ IF.
Who's supporting the EUV supporters?
Among his own summary of the SPIE symposium's EUV updates
, Vivek Bakshi, president of EUV Litho, expresses doubt that 100W will be bet before 2012 (after doubling to 40W in 2011), but that's ok since those 100W sources would hit the field around the same time as the 3300 HVM tools.
Bakshi also lamented the lack of support (i.e. funding) for EUV. For one, there's little research into improving source components beyond the HVM-baseline 100W (e.g. 150W-250W). "With very few exceptions, source research, the very lifeline of EUVL, has essentially been stopped," he writes, noting for example work from Purdue's Ahmed Hassanein in increasing conversion efficiency and reducing debris which has gone largely unfunded, and apparently will soon cease. (On the other hand, research from Gigaphoton's Hakaru Mizoguchi went back to the university drawing board with a 10Hz source to improve CE and eliminate most debris, Bakshi notes.) Little if anything has been shown in scaling DPP beyond 100W -- there is work at the ISAN Institute to scale DPP, but he questions the direction provided by industry beyond that.
Regarding mask metrology tools (AIMS), Energetiq's source is 8W/mm2
sr (scalable to required 25W/mm2
sr), but the work needs external investment -- the overall source trio aren't really in this game, and while others have shown progress in principle (NanoUV/special design DPP, Adylyte/Sn LPP, Bruker-AIXUV/Sn LPP), it's unclear how or whether these could be developed in time to support mask metrology infrastructure. "EMI funding is not going toward efforts to make sure that the most critical element of the technology is ready in time," Bakshi writes. "This critical technology has to be driven by a consortium, or we’re not going to end up where we want to be."
Two EUV alternatives
A poll conducted during one SPIE session showed unanimous choice of EUV as the industry's biggest challenge, and also the most likely risk of failure to be adopted (more than 3D memory, through-silicon vias, or FinFETs), Kumar notes. Though EUV also is clearly the choice over other litho approaches, there remain difficult challenges needing to be resolved.
Of the non-EUV litho paths, maskless e-beam seems to be favored over nanoimprint across all devices (NIL has favor possibly in DRAM), and among the approaches, work by Mapper and KLAC's "reflective" e-beam (dubbed REBL) appear more promising. Throughput is still an issue, though (<0.1 wafers/hr on a Mapper alpha tool, projected 10WPH on a HVM tool). The logic is whether a cluster of ~10 Mapper tools could hit the 100WPH benchmark for HVM at roughly the same price of an EUV system. Throughput depends on the number of beams and current; with initial systems having 110 beams and only 0.3Î¼A current (HVM needs 13,000 beams and 13Î¼A), Mapper's technology has to make "tremendous progress to be successful," he notes.
KLA-Tencor, meanwhile, says its REBL system uses microlensing and lenset arrays for a more compact design; benefit is high packing density, but maybe more blur due to columbic interaction between the beams (which cross in the REBL approach, vs. separate in a Mapper system). The company has mentioned planning 1M beamlets for 5WPH throughput, which Kumar calls "intriguing" but doesn't expect any impact for a couple of years.