Three decades of technological progress have provided exponential gains in IC performance over time and led to feature sizes in the tens of nanometers. If the scaling pace can be maintained, planar dimensions on the order of a few nanometers will soon be achieved. Yet difficult technical and scientific challenges may slow progress if they are not addressed expeditiously. The 2003 Semiconductor Research Corp. Executive Technical Advisory Board (ETAB) Summer Study and the 2003 Intel/NSF/SRC Silicon Nanoelectronics and Beyond workshop identified directed self-assembly of nanoengineered materials as one of the top priorities of semiconductor research.
This high priority is the result of the perceived limitations of subtractive patterning in the sub-40nm domain. Conventional patterning requires delivery of large amounts of information and energy to the material from external sources, and it produces much waste. The inspiration for research in self-assembly derives in part from observing the mechanisms for self-organization and self-assembly that abound in the natural world, where systems tend to assemble directly with minimal energy input and minimal waste (see figure). For fundamental reasons, subtractive processing yields unacceptable dimensional variability and defect levels in the deep nanometer domain. Lithographic fabrication techniques, buttressed by bottom-up assembly methods, may enable atomic-scale dimensional control and minimum defect levels.
A viable self-assembly technology for nanoscale electronics could afford the following benefits:
- sustainable scaling of CMOS manufacturing technology to its ultimate limit;
- alternative scalable manufacturing technologies for nanoelectronic devices; and
- support of heterogeneous integration with CMOS technology to provide a commercialization path for nanotechnology innovations.
SRC task forces have identified three overarching research themes in the field of directed assembly of nanoelectronics. The first is nanoengineered self-assembling materials and structures directed at anticipated problems for CMOS scaling. The topic includes formation of interconnects, interconnect barrier layers, low-k interlayer dielectrics, gate dielectrics, gate electrodes with a continuously variable work function, interfaces and materials by design, novel nanoscale measurement methods, CD control in CMOS fabrication, and molecular- level process control.
Attributes of subtractive processing vs. directed self-assembly.
The second theme, novel self-assembling materials and structures for alternative devices beyond CMOS, focuses on designed self-assembled molecules and structures that provide enhanced information processing functionality. Examples of alternative devices that could be covered include single-electron transistors, molecular electronics, quantum cellular automata (QCA), spin transistors, etc.
The third theme is directed self-assembly for heterogeneous integration on Si platforms. This includes dendrimers for optoelectronics/photonics/semiconductor hybrids; engineered heterogeneous dielectric layers and composite nanodot-in-insulator materials for advanced nonvolatile memory; exploration of self-healing, adaptive, and bio-semiconductor hybrid structures; and templating, error-correcting, and defect-tolerant systems. It also includes the potential of advanced biomimetic concepts applicable to semiconductor materials and manufacturing, design and assembly of composite materials, and hierarchically integrated structures with complex functionality (retina-like materials being one example).
Extending CMOS scaling
The manufacture of CMOS systems faces increasingly difficult technical challenges in the far nanoscale domain. A critical near-term need is the identification of new material families and nanomanufacturing processes that enable manufacturable extensions for CMOS technology. Furthermore, if directed self-assembly is to affect mainstream manufacturing, it is urgent that viable options be identified soon. On average, the lead time from first research result to introduction into manufacturing is approximately twelve years. Hence, today's breakthrough concepts would influence manufacturing in 2016.
Directed self-assembly technologies may address many specific near-term materials challenges. For example, over the next few years, robust, zero-defectivity, graded composite gate dielectric materials will be needed that minimize gate leakage current, while preserving channel mobility. A similar challenge exists for metal/low-k dielectric (k<2) materials systems that could enable future interlevel interconnect technologies. Other advanced interconnect materials must be highly conductive in sub-65nm-wide lines, and exhibit high corrosion resistance. Contact engineering represents a challenge common to device and interconnect technologies. Directed assembly methods are needed that achieve precise structural contact, optimal electrical overlap, and ballistic transport between a device and an interconnect.
Self-assembled processing materials, such as novel resists, are another important domain. For example, high-frequency line-edge roughness, long-range dimensional variability, and diffusion effects in today's chemically amplified resists are pointing to a high-volume manufacturing red brick wall — to use ITRS terminology — for sub-40nm resist and patterning technology.
Other potential applications for directed self-assembly technologies include:
- self-assembled block copolymers as low-k material,
- directed self-assembly of resists to reduce process variability,
- self-assembly of nanodots for memory applications,
- self-assembled carbon nanotubes for interconnects,
- self-assembled monolayers as corrosion barriers for Cu interconnects,
- self-assembly methods for patterning metal wires and electrodes, and
- self-assembled conductive polymers.
Building CMOS alternatives
This theme targets directed self-assembly applications that enable scalable and sustainable, benign, high-performance materials and manufacturing options for alternate information storage and processing technologies. The fundamental question is whether the guiding principles for directing information flow required to assemble materials into desired structures can be identified. Several new materials, components, and structures — such as block copolymers, carbon nanotubes, nanowires, quantum dots, and molecular materials — are under consideration. These materials, components, and devices will become mainstream technologies only if they can demonstrate enhanced performance and manufacturability. For example, doped nanotubes have been suggested as prototypes for 2D and 3D devices and circuits. Can billions of these nanotubes with desired dimensional and electrical properties be placed reproducibly at arbitrarily specified locations?
Examples of beyond-CMOS applications for directed self-assembly could include: fabrication, assembly, and characterization of molecular electronic components; conductive polymer interconnections for 3D computing structures; and applications of self-assembled porous alumina.
Bringing new functionality to electronics
Future mixed-signal and system-on-chip applications will require the heterogeneous integration and hierarchical assembly of new material classes, structures, and functionality onto silicon platforms. These applications will yield complex structures that locally integrate sensing, processing, and transmitting functionalities, and are compatible with FET technology.
Functional materials and structures found in nature, such as rhodopsin and the retina, provide clues to potentially useful alternatives to transistor-centric applications. Additional functionalities may include, but are not limited to, communication, adaptive control, wave directing, energy scavenging and storage, fluidics, cooling, material nano-analysis, prosthetics, etc.
Fundamentally, we have yet to understand and predict the a priori relationships between a structure's local environmental, synthetic, assembly, and processing parameters, and a structure's composition, orientation, placement, precision, and functional macroscopic properties.
Research in the following areas should be directed to the development of kinetic and thermodynamic rules for synthesis and assembly to guide the rational design of useful nanomaterials. These include functional dendrimers; multilayered hybrid 3D nanofluidic and microfluidic devices; biocompatible devices; virus, DNA, or protein directed assembly of nanosized materials and oriented nano structures; and directed assembly of bioinorganic nanostructures.
We are entering a transition period from a vaguely defined general area of self-assembly or directed assembly, toward more focused efforts to understand and realize the potential of self-organization for building future information-processing devices, circuits, and systems.
It is time for this interdisciplinary research enterprise to address critical knowledge gaps, synthesize assembly design rules, and apply them to useful demonstration vehicles. For directed self-assembly to enter mainstream manufacturing, it must competitively enable the sequential and hierarchical fabrication of useful and functionally complex nanostructures.
Daniel Herr received his PhD from the U. of California, at Santa Cruz, and is director of nanomanufacturing sciences research at Semiconductor Research Corp., Brighton Hall, Suite 120, 1101 Slater Rd., Durham, NC 27703; ph 919/941-9431, fax 919/941-9450, e-mail email@example.com.
Victor Zhirnov received his MS from the Ural Polytechnic Institute in Ekaterinburg, Russia, and his PhD in applied physics from the Institute of Physics and Technology in Moscow. He is a research scientist at Semiconductor Research Corp.