Paul Werbaneth, Tegal Corporation, Petaluma, California
Plasma etch processes can be tailored to address MEMS device fabrication challenges, including high aspect ratio structures in silicon, thin noble metal and piezoelectric structures, and optically active compound semiconductor devices. These three etch examples each depend on optimizing a different region in the etch process space: specifically, etch chemistry, ion bombardment, and temperature elevation and control.
Figure 1. ICP fluorine-based silicon etch.
Micro-electromechanical systems (MEMS) and micro-optical-electromechanical systems (MOEMS) form the basis of a new way to interact with the physical world. Quick, sturdy, cheap to make, and reliable, MEMS extend our ability to manipulate tiny systems and forces beyond what we presently do with electrical signals in microelectronic devices: for example, to the realm of pressure, light, chemical sensitivity, and vibration. The manufacturing processes for MEMS and MOEMS are immediately familiar: the basic sequence of thin film deposition, photolithography, and etch is repeated many times to make a finished MEMS device.
As evidence of the way MEMS have taken root, there are already a host of MEMS foundries around the world offering standard process flows for which customers can design devices and expect to receive good working parts. There is also a rapidly growing list of start-up companies eager to capitalize on MEMS applications, particularly as they apply to optical fiber-based telecommunication. The many novel structures and materials employed in MEMS fabrication result in several branches off the family of standard silicon processing modules.
Figure 2. HRe- chlorine-based silicon etch.
Etching of MEMS devices is particularly interesting, as it results in the formation of structures with dramatic aspect ratios, for example, or allows for the creation of piezoelectric-based structures capable of motion, or of structures that can generate, channel, and process light at frequencies exceeding 80GHz. The etch applications for MEMS devices considered here each accentuate one strength of modern plasma etch techniques. For the etching of deep structures into silicon it is control over etch chemistry that results in anisotropic etch profiles at high etch rates. Etching piezoelectric materials, such as lead zirconium titanate (PZT), requires that the ion bombardment component of the etch be independently adjustable. Many MOEMS devices are based on and built into InP films; for these, exact control of wafer temperature in the plasma etch reactor permits the InP etch to proceed at acceptable rates, with good profile and sidewall smoothness control.
Here is a partial list taken from the call for papers for the SPIE 2001 International Symposium on Micromachining and Microfabrication  of established MEMS applications: sensors for pressure, temperature, chemistry, and magnetic fields; accelerometers and gyroscopic devices; sensors, actuators, and microvalves for handling fluids; variable capacitors, variable inductors, and micro RF switches; chemical and biological analysis microsystems; fluid mixing and transport systems; bio/chemical reactors; MEMS-based display systems; fiber optic components and switches; actuators for optical applications; and micromachined optical bench-on-a-chip.
Also, from the Dynamic Silicon Conference in San Francisco (January 2001): MEMS for multilightwave networks; MEMS in diagnostic applications; MEMS for diabetes; MEMS in biomedical analysis; MEMS for RF electronics; microfluidics for DNA analysis; and power MEMS.
Each of the specific MEMS applications above has its own combination of patterns, thin films, and packaging that allows the devices to perform their designed function. Electrostatically actuated micromirrors with Cr/Au surfaces can be formed in silicon by bonding oxidized wafers together, then etching deeply through the silicon to form the mirror and mirror spring structures. Fixed and tunable RF capacitors can be formed over deep cavities in silicon using high aspect ratio silicon etches . High-frequency tunable devices can also be fabricated from BST dielectrics, on silicon or quartz substrates, using platinum and iridium electrodes . Optical components such as Mach-Zehnder switches and modulators, along with optical resonators and optical waveguides with low coupling losses, can be fabricated by etching MOEMS structures in InP films, usually with silicon dioxide hard masks .
Figure 3. Platinum etch rate vs. low- and high-frequency power.
Modern plasma etch tools and processes have evolved from humble beginnings to their present state, where etch processes allow precise control of plasma conditions and surface reactions, so that optimal etch results can be obtained for a bewildering array of applications. Some of the reliable tricks hiding in the plasma etch engineer's bag are manipulation of the etch chemistry within the plasma reactor, manipulation of the ion flux and energy at the wafer surface, and manipulation of the substrate temperature during etch. The three plasma etch applications for MEMS devices discussed below each illustrate a different aspect of these three broad etch principles. Plasma etches optimized for chemistry are useful for controlling etch rate and profile in the deep etching of silicon; plasma etches optimized for ion bombardment and flux are useful for enabling etching of materials such as platinum and PZT; and, for InP, etch processes optimized for elevated wafer temperatures are essential for success.
Deep silicon etches: optimizing etch chemistry
For the deep etch of silicon trench structures in MEMS devices, it is all a matter of what is acceptable in the trade-off between etch rate, etch profile, and sidewall smoothness. Here, deep etches are those extending 50-100µm into the silicon, producing the dramatic, high aspect ratio features very often used to singularly represent MEMS devices. The electrostatically actuated micromirrors already cited are one example of deep silicon etch structures, and so are the tiny gears, micro-motors, and minuscule turbines one often sees.
Silicon is not a difficult material to etch in a plasma reactor. Single crystal (and polycrystalline) silicon reacts with atomic fluorine, atomic chlorine, and atomic bromine at room temperature to form volatile halide compounds. The reaction with atomic fluorine proceeds spontaneously in a classic "chemical" etch. CF4, SF6, and other fluorine sources will etch silicon rapidly, but with a propensity to etch isotropically, resulting in undercut from the original etch mask. Manufacturing process optimization generally looks to lower cost of ownership (COO) for any given process module, and the COO for a deep silicon etch will vary significantly with wafer throughput, which will be directly tied to etch rate (for a constant target etch depth). The general benefit of fluorine-based etching of silicon will be its high etch rate, often greater (sometimes much greater) than 1.0µm/min. Something must be done, however, to control the etch profile if an anisotropic etch is needed.
Chlorine etching of silicon is assisted by ion bombardment of the chlorine-saturated silicon surface. The spontaneous etch rate of silicon with atomic chlorine at room temperature is almost zero. The etch front will only proceed into a silicon film when it is subjected to a flux of energetic ions. Plasma etching of silicon in chlorine plasmas is inherently anisotropic. Vertical profiles are readily obtained with chlorine, but at the cost of etch rate when compared to fluorine plasmas (several thousand Å/min vs. several µm/min) .
The volatility of silicon bromide etch products is less than that of silicon chloride etch products. Etching silicon with bromine sources such as Br2 or HBr generally results in slower etch rates than with chlorine, with the same good etch anisotropy. MEMS etching with bromine plasmas seems to be of less interest than the chlorine plasmas and fluorine plasmas, probably because of the low etch rates observed and for the tendency of reactors to become dirty quickly from the redeposition of silicon bromide etch products.
There are several ways to get the bang of fluorine plasma etch rates without sacrificing profile control. At least three methods have been reported: 1) etching with fluorine plasmas at low (cryogenic) temperatures; 2) etching with fluorine plasmas to which additive gases have been added; and 3) dividing the etch into many "mini-etches," where brief exposure of the silicon to an etching chemistry is alternated with exposure to a chemistry that deposits an undercut-preventing protective film on the already etched sidewall.
Cryogenic etching in plasma reactors has one significant disadvantage to consider: the cost and added equipment complexity of keeping a wafer at -70°C to -150°C is considerable. The task is not impossible, just daunting. Additive gases with fluorine chemistries also make sense, although they typically decrease the silicon etch rate as their mole fraction increases. Also, getting the mole fraction of the additive correct for good sidewall control can be tricky. Success has been reported by at least one group  for combinations of both cryogenic temperatures and additive gases for SF6-based silicon etch.
Figure 4. Etched Pt/PZT/Pt stack.
The most popular etch process for deep silicon structures was developed and patented by researchers at Robert Bosch GmbH in Germany. Their idea was to divide the process into an etching stage and a passivation stage, using fluorine-based chemistries (for example, SF6 in the etching phase and some kind of fluorocarbon, such as C4F8, during the deposition phase). The etch rate is high and, when considered along the entire depth of a 100µm silicon trench, the profile is anisotropic. Profiles obtained using this process are generally not as smooth as those obtained from chlorine etching of silicon, as shown in Fig. 1  and Fig. 2. For optimizing deep silicon etch chemistries for MEMS devices, however, it is all a matter of what is acceptable in the trade-off between etch rate, etch profile, and sidewall smoothness.
Difficult-to-etch materials: optimizing ion bombardment
Platinum, iridium, iridium oxide, lead zirconium titanate (PZT), and barium strontium tantalate (BST) are among the high-k dielectrics and noble metal electrodes that are classic examples of materials that fall under the rubric "difficult to etch." When PZT is used to form tiny moving mirrors (thanks to the piezoelectric properties of PZT), or when PZT or BST are used in varactors or other tunable circuit elements, one invariably encounters a noble metal. The oxidizing environment found during the deposition of these dielectric films means that some electrode material capable of resisting oxidation (platinum) or capable of forming an electrically conductive oxide (iridium) must be used. It is an easy way to work out the deposition process, but using noble metals introduces patterning difficulties how do we etch them?
Classically, ion milling has been used in laboratory applications for patterning almost any known material. The physical action of energetic ions (usually argon) can remove surface atoms even when the vapor pressure of the material(s) to be removed is negligibly small. There are drawbacks, though. For example, when ion milling is used to pattern platinum, the removal rate is low (~400Å/min); the throughput is low; and the tendency is for the etched platinum to redeposit along the edge of the etch mask, creating veils, or fences, after the etch mask is removed. These veils, being electrically conductive, can lead to yield-limiting electrical defects in finished devices.
Figure 5. Normalized InP etch rate vs. temperature.
Some other candidates for etching these difficult materials include wet etch, chemical-plasma etch, reactive ion etch, and ion beam etching. Most of the plasma etch optimization work performed for platinum and PZT patterning has concentrated on balancing etch rate, etch profile, and veil formation. The key finding, using a variety of plasma reactor configurations, is that in a reactive environment such as an argon-chlorine-based plasma the etch rates of platinum and PZT increase when their surfaces are bombarded by ions of increasing energy. Additionally, veil formation can be controlled by adjusting the reactive (halogen) component mole fraction, either by increasing its flow, or by increasing the dissociation of the etchant gas in the plasma (Cl2 2Cl).
Plasma etch reactors using high-frequency energy sources are very good at producing well-dissociated plasmas. Plasma etch reactors using low-frequency energy sources are very good at accelerating ions toward the surface of the wafer needing to be etched, thereby offering direct control over ion bombardment energy. When both high- and low-frequency energy sources are used simultaneously, the reactive component of the plasma (gas dissociation) and the physical component of the plasma (energetic ion bombardment) can be independently controlled, greatly increasing the etch development engineer's ability to optimize the etching of difficult materials.
Figure 3 shows a surface plot of the effect of two experimental factors low-frequency power and high-frequency power on the etch rate of photoresist-masked platinum in the Tegal HRe-, a capacitively coupled high-density plasma reactor. Etch rates greater than 1000Å/min are possible in this reactor at moderate (80°C) wafer temperatures.
As a practical matter, PZT-based structures for MEMS devices typically use fairly thin films, meaning that etch rates of about 1000Å/min result in acceptable system throughput. The PZT stack used for a MEMS-based atomic force microscopy application, for example, consists of a bottom layer of platinum 1500Å thick, 2800Å of PZT, and a platinum top electrode of similar thickness . An SEM image showing a similar stack, etched veil-free using a photoresist mask in the Tegal HRe-, is presented in Fig. 4.
Deep etches of difficult-to-etch materials: optimizing etch temperature
The use of InP for MOEMS devices creates significant challenges for the plasma etch engineer. InP-based devices can require deep etches (microns deep) into a material (InP) that is difficult to etch. The huge demand being placed on optical component makers means that wafer fabs accustomed to running only modest volumes of InP are being asked for output like (and have their productivity measured against) commercial silicon fabs. InP etch processes need to give high etch rates (for throughput) using inherently clean chemistries (for etch tool uptime) . This is a problem because the old ways of etching InP in plasma reactors generally emphasized etch rates over reactor cleanliness.
CH4/H2 chemistries in plasma etch reactors can etch InP films at room temperature with rates on the order of thousands of Å/min, but the same hydrogen-rich environment that etches InP so well also produces significant deposits of hydrocarbon polymer on the inner walls of the plasma reactor. This polymer buildup leads to process instability and high levels of particles in the tool, which is remedied by some kind of tool cleaning. The severity of the deposition that occurs with CH4/H2 chemistries has promoted keen interest in finding alternatives [10-12].
InP reacts with chlorine in plasma environments to form chloride compounds. Two unpromising characteristics of this reaction are its speed (slow), and the low volatility of the indium chloride compounds produced. Classically, the way to promote the speed of a chemical reaction and to increase the volatility (vapor pressure) of substances is to increase the ambient temperature. Chemical reaction rates are described by the Arrhenius equation, which predicts a rate increase as the temperature increases for any kind of chemical reaction. Vapor pressure curves for both solid-vapor equilibria and liquid-vapor equilibria show that as the ambient temperature is increased, the vapor pressure of the liquid or solid substance of interest increases.
Taking advantage of both trends, we have used an HRe- reactor modified to run above 100°C for InP etching. Our work with this capacitively coupled high-density plasma etch tool for InP etch at elevated etch temperatures agrees very well with the general results reported for both an ECR tool  and a reactive ion beam etch tool . Figure 5 presents the normalized InP etch data as a function of temperature for these three different plasma etch tools, all using chlorine-based etch chemistries.
Between 100 and 200°C, the InP etch rate increases dramatically regardless of the etch tool used, probably as a result of both an increase in the chemical reaction rate between indium and chlorine and the increasing vapor pressure of indium chloride. As a practical consideration, such a steep increase in etch rates suggest three places in which to operate the etch process: 1) <100°C, where the InP etch rate is constant; 2) somewhere >200°C, where the change in InP etch rate with temperature is thought to be less pronounced; or 3) in the region ~150°C for preserving photoresist masks while realizing a 5x increase in InP etch rate, but only with very good wafer temperature control.
MEMS and MOEMS makers need modern fabrication techniques to produce their devices. The versatility of today's plasma etch tools and processes means that high aspect ratio structures in silicon, thin structures using noble metals and piezoelectrics, and optically active compound semiconductor devices can all be created with superb etch fidelity while maintaining wafer throughputs conducive to cost-effective volume manufacturing. These three etch examples each depend on optimizing a different region in the etch process space. For deep silicon, it is etch chemistry that is critically important to maintaining anisotropic etch profiles over the length of the silicon trench. For platinum and PZT, control over ion bombardment at the wafer surface creates high rate, veil-free etching. InP etching relies on one's being able to elevate, and closely control, wafer temperatures during etch so that the InP etches rapidly in a chemistry (chlorine) that does not create contaminating deposits on the plasma reactor walls.
- http://www.cnf.cornell.edu/2000cnfra/2000cnfra.html, Cornell Nanofabrication Facility 1999-2000 Research Accomplishments.
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Paul Werbaneth is a regional marketing manager at Tegal Corp. He is a graduate of Cornell University and has worked in the semiconductor industry for more than 20 years. He is a member of AVS, ECS, IEEE, and is on the Steering Committee of the Advanced Semiconductor Manufacturing Conference. Tegal Corp., 2201 S. McDowell Blvd., Petaluma, CA 94954; ph 707/765-5608, fax 707/773-3015, email email@example.com.