Nanoplas introduces a new class of dry-etching technology

Nanoplas, a global supplier of plasma processing equipment to the semiconductor industry, today announced a new dry-etch process offering virtually unlimited etch selectivity for removing dielectric films on microprocessors and memories at high throughput.

Nanoplas’s new Atomic-Layer Downstream Etching (ALDE) processing allows etching rate and selectivity to be controlled independently, which provides virtually unlimited selectivity. Based on the company’s new inductively coupled plasma (ICP) source, ALDE features atomic-layer control at wafer-surface level. 

“Nanoplas’s Atomic-Layer Downstream Etching technology enables a new class of plasma-based etching and stripping processes at the 20nm technology node and beyond,” said Gilles Baujon, Nanoplas CEO. “By allowing virtually unlimited selectivity, ALDE will alleviate many of the challenges engineers face in manufacturing next-generation devices – and enable them to achieve higher yields – because the process window will be larger and will easily integrate with existing pre- and post-ALDE steps. This is a huge benefit and driver for IC manufacturing. Bringing a new generation of devices to production is all about having sufficiently large process windows to generate high yields.”

Nanoplas intends for ALDE to replace current wet and dry techniques for removal of the many critical silicon-nitride spacer films in most advanced transistor-formation technologies.

Nanoplas expects to release a first ALDE application for SiN etching in Q2.

Nanoplas is an equipment supplier to the semiconductor industry specialized in novel plasma process solutions for nanoelectronics. The company’s plasma-processing tools are used by leading microelectronics companies in North America, Europe and Asia. The company is based near Grenoble, in St-Égrève, France.

 

Font Sizes:

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.


VIDEOS

Electroiq 2 EIQ2

NEW PRODUCTS

EV Group rolls out EVG120 processing system

May 7, 2013 EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, t...

Quartz Imaging introduces automated measurement for semiconductor images

April 30, 2013

It can be very time-consuming for engineers to measure the various features of an X-SEM image of a semiconductor device.

Axcelis launches Purion XE high energy implanter

April 30, 2013 Axcelis Technologies, Inc. today announced the introduction of the Purion XE next generation single wafer high energy implanter...

EMS debuts low-cost conductive LED die attach adhesive

April 29, 2013 Engineered Material Systems debuted its CA-105 Low-Cost Conductive LED Die Attach Adhesive for attaching LEDs and other small s...

TECHNOLOGY PAPERS

Rapid Defect Indentification with Layout-Aware Diagnosis

Scan logic diagnosis is a powerful tool to help failure analysis engineers determine the root cause of a failing die. Yield engineers, on the other hand, are...

Flip Chip Devices get Flat and Happy

Thin is definitely in, but what our modern flip chip devices really want is to be flat and happy! As flip chip die have become increasingly thinner in recent...

WEBCASTS

Surface Cleaning and Preparation

This introduction requires the development of new critical and selective cleans tackling galvanic corrosion, pattern collapse both in FEOL and BEOL...

450mm Status Report

Hear from the G450C General Manager, Paul Farrar Jr., on the current status of activities, key milestones and schedules, and imec’s senior business...

SUBSCRIBE

LATEST ISSUE

05/01/2013
Volume 56, Issue 3

Article Archive for Solid State Technology.

© 2013. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS