TSMC integrates Ge on Si in p-type FinFETs

09/20/2012

Researchers are investigating the use of high electron-mobility materials as a way to improve FinFET performance, such as germanium (Ge) for the channels in p-type transistors. But it is difficult to grow Ge directly on a silicon substrate and usually many interface layers are built, each successive layer having a greater concentration of germanium. However, this gives rise to unwanted complexity and cost.

At this year’s International Electron Devices Meeting (IEDM), foundry TSMC will describe an alternative: a heterogeneous epitaxial growth process which for the first time enables Ge to be directly grown on Si. With careful process optimization, the researchers determined that when a fin’s height-width aspect ratio is ~1.4 or greater, imperfections at the Ge-Si interface (called threading dislocations) will be confined to the bottom part of the fin, leaving its top portion—the active area—defect-free. They demonstrated the technique by building devices with excellent subthreshold characteristics (slope=74mV/dec), good short-channel-effects control and high performance (1.2mA/µm at Vdd=1V). The work paves the way for the use of Ge in future p-type FinFETs.


The schematics show representations of the threading dislocations in (a) wide and (b) narrow active areas. In (b) the threading dislocations terminate at the sidewalls, leaving the top part defect-free.

Font Sizes:

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. 


VIDEOS

Electroiq 2 EIQ2

TECHNOLOGY PAPERS

Automated Test Creation for Mixed Signal IP using IJTAG

The creation of test patterns for mixed signal IP has been, to a large extent, a manual effort. To improve the process used to test, access, and control embe...

Faster Time to Root Cause with Diagnosis-Driven Yield Analysis

This whitepaper describes the benefits of implementing a diagnosis-driven yield analysis flow using the Tessent® Diagnosis and Tessent YieldInsight® software...

WEBCASTS

Innovation in Semiconductor Manufacturing Instrumentation

As the industry is incorporating more MEMS devices with integrated magnetic sensors, they are encountering challenges that cannot be overcome with ...

3D and 2.5D Integration: A Status Report Live Event

This webcast will explore the present status of 2.5 and 3D integration, including TSV formation.

Questions and answers on FD-SOI

Fri Jan 04 14:56:00 CST 2013

Present your ideas at The ConFab in 2013

Mon Nov 26 09:04:00 CST 2012

The ConFab 2013 countdown begins

Thu Aug 09 16:18:00 CDT 2012

The ConFab: Big data is here

Sun Jun 03 19:19:00 CDT 2012

Oh, snap!: Pics from The ConFab

Sun Jun 03 19:09:00 CDT 2012

SUBSCRIBE

LATEST ISSUE

Volume 56, Issue 1

Article Archive for Solid State Technology.

© 2013. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS