KLA-Tencor's updated LED wafer inspection tool boosts throughput, efficiency

12/06/2012

December 6, 2012 - KLA-Tencor says its new fourth-generation LED wafer inspection system achieves greater flexibility, increased throughput, and improved efficiency for inspecting defects and performing 2D metrology in LED applications, as well as MEMS and semiconductor wafers (up to 200mm).

The ICOS WI-2280, built on the company's WI-22xx platform, supports handling of whole wafers in carriers and diced wafers in hoop ring or film frame carriers, to accommodate multiple media with minimal equipment changeover. An enhanced rule-based binning defect classification and recipe qualification engine enable faster yield learning during production ramps, and improved process control and process tool monitoring strategies. Highly flexible advanced optical modules with dedicated image processing enable high defect capture rate and recipe robustness against varying process background. A frontend-to-backend-of-line connectivity analysis capability -- working in conjunction with the company’s Candela LED unpatterned wafer inspection system and Klarity LED automated analysis and defect data management system -- delivers a single platform for defect source analysis.

"Increasingly, LED manufacturers are demanding improved detection and classification of yield relevant defects of interest, which enables them to take faster corrective actions to improve their yields at higher inspection throughput. There is also a growing need to boost productivity by enabling faster production recipe creation," stated Jeff Donnelly, group VP for growth and emerging markets at KLA-Tencor. The ICOS WI-2280 "ultimately enabl[es] LED manufacturers to achieve better lumens per watt and lumens per dollar performance."

In addition to LED manufacturing, the system can work in MEMS, semiconductor and compound semiconductor, and power device applications (wafers spanning 2-8 in.), the company says: backend-of-line and post-dicing outgoing quality control or binning; frontend-of-line patterned wafer inspection for baseline yield improvement, rework, excursion control, or overlay; and 2D surface inspection and metrology.

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