Advanced non-etching adhesion promoters eliminate interposer layer

11/28/2012

Major MPU makers are starting to focus on using more exotic dielectric materials with low signal loss (low loss tangent) to meet the higher frequency specs of next-generation MPUs. These materials, such as cyanide ester and polyphenyl ether (PPE), will be able to reliably bond with conductor surfaces using advanced non-etching adhesion promoters (NEAPs) that do not require an interposer layer.

"Unlike some of the other commercially available non-roughening adhesion promoters, the newly developed NEAP does not require an interposer layer such as a thin layer of tin," explains Dr. Rami Haidar, global product manager for surface treatment technology at Atotech Deutschland GmbH, a Berlin, Germany, manufacturer of processes and equipment for the PCB industry. "By avoiding the use of a metal interposer layer, the new NEAP process is more cost competitive and environmentally friendly."

Most of the commercially available NEAP processes are based solely on chemical bonding for providing adhesion between the smooth conductor surface and dielectric materials, says Atotech. The potential weakness of such chemical bonding is its adhesion performance, which depends highly on the type of material to which the adhesive layer is bonded.

"The new NEAP provides mechanical bonding," states Dr. Haidar. "It propagates a nano-scale structure of copper oxide that forms a thin anchoring layer with increased surface area."

The new NEAPs are independent of the adhesion performance of various types of dielectric materials, and the new NEAP process adds surface area to the conductors. Research findings show that copper oxide on the surface hardly contributes to surface roughness, which the root mean square measured at <250 nm, reports Atotech.

The use of NEAP is one of the key technologies for inner and outer layer bonding between conductors and dielectric materials. It enables state-of-the-art IC-substrate manufacturing and meets the technical specifications of major MPU manufacturers.

For future packaging substrates, L/S (lines and spaces) become increasingly finer, even below 8/8 µm. This poses a steep challenge for manufacturers in regard to etching such fine tracks, since the current process of record for adhesion promoters in the packaging industry is still an etching-based system.

Font Sizes:

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. 


VIDEOS

Electroiq 2 EIQ2

TECHNOLOGY PAPERS

Automated Test Creation for Mixed Signal IP using IJTAG

The creation of test patterns for mixed signal IP has been, to a large extent, a manual effort. To improve the process used to test, access, and control embe...

Faster Time to Root Cause with Diagnosis-Driven Yield Analysis

This whitepaper describes the benefits of implementing a diagnosis-driven yield analysis flow using the Tessent® Diagnosis and Tessent YieldInsight® software...

WEBCASTS

3D and 2.5D Integration: A Status Report Live Event

This webcast will explore the present status of 2.5 and 3D integration, including TSV formation.

Questions and answers on FD-SOI

Fri Jan 04 14:56:00 CST 2013

Present your ideas at The ConFab in 2013

Mon Nov 26 09:04:00 CST 2012

The ConFab 2013 countdown begins

Thu Aug 09 16:18:00 CDT 2012

The ConFab: Big data is here

Sun Jun 03 19:19:00 CDT 2012

Oh, snap!: Pics from The ConFab

Sun Jun 03 19:09:00 CDT 2012

SUBSCRIBE

LATEST ISSUE

Volume 56, Issue 1

Article Archive for Solid State Technology.

© 2013. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS