by Chi-I Lang, VP of workflow products and applications, Intermolecular Inc.
June 29, 2011 - The American Vacuum Society's 2011 Atomic Level Deposition Conference in Cambridge, MA, logged an excellent second day, with the focus shifting towards ALD manufacturability, and a number of sessions that could only be described as "cool."
For semiconductor veterans, the ALD Conference is reminiscent of SEMICON West shows in the 1970s and 1980s: lots of ambitious competitors pursing a new and expanding market -- with actual hardware on display -- and a sense that everyone at the show was witnessing the real-time development of new production technologies. It's an exciting feeling, and suggests that ALD has a very bright future ahead in a wide range of applications, with its outstanding film quality, wide range of precursors, and excellent step coverage (one presenter showed coatings on carbon nanotubes with an amazing 2000:1 aspect ratio).
|Atomic Level Deposition Conference 2011|
|Day 1: Interface engineering, rabbit ears and Roy Gordon|
|Day 2: Manufacturability takes center stage|
|Day 3: Precursor needs, spatial ALD, and butterfly wings|
Dutch equipment developer Levitech NV, one of the few suppliers able to show video of its equipment up and running, impressed the audience with their stated throughput of 3600 wafers/hour performing aluminum oxide passivation layer deposition on a solar cell production line. The spatial ALD system utilizes a continuous flow approach with no pulsing. A belt carries six-inch substrates past precursor dispensing stations; the belt's speed is the controlling factor for deposition, in a process somewhat analogous to how an ion implanter achieves dose control.
Eastman Kodak's David Levy provided another intriguing take, presenting a unique open-air spatial ALD approach to ALD on plastic. More than one attendee had to ask why Kodak is interested in ALD -- the company is making a serious push in flexible substrates, and believes that it can use ALD as a patterning step in production of zinc oxide thin film transistors on plastic. The roll-to-roll process offers extremely high throughput and low cost. One challenge is the need to maintain very tight spacing (on the order of 100μm) between the substrate and multiple deposition showerheads. Any variation can cause crosstalk between precursors and oxidizers. Although the work is still at an early stage, Kodak was able to show actual transistors and electrical performance results, and their progress was impressive.
Also discussing variations on the roll-to-roll concept were Lotus Applied Technology, which is developing a serpentine-type film deposition system to deposit metal oxides on polymers for moisture resistance; the University of Colorado at Boulder, which had a proof-of-concept tool; and Cambridge Nanotech, which is also at the conceptual stage.
Separately, Cambridge Nanotech's Ganesh Sundaram offered a fascinating peek behind the curtain of equipment development, with a presentation of computational fluid dynamic simulations of ALD chambers. Cambridge Nanotech's architecture uses cross-flow of gases rather than showerheads; this helps keep chambers small for quick purging, and also has potential for good uniformity and throughput. Sundaram showed how several chamber designs (including a batch system and large-substrate system) have evolved, with animations demonstrating the reduction in dead spots and optimization of gas flow. Clearly, computational design is a powerful tool, and Cambridge Nanotech seems to be making significant progress beyond its first-generation tools that are ubiquitous in research facilities.
Intel was also prominent in today's sessions. Juan Pablo Trelles discussed fluid-flow effects in ALD, including precursor modifications and equipment design considerations. While Intel has successfully implemented ALD for hafnium oxide deposition, Trelles noted that the technology is only half the battle -- the big question now is cost-of-ownership for additional layers at more advanced process nodes. ALD's uniformity will be needed for the sidewalls on Intel's 3D FinFET transistor design, to maintain device performance.
S.B. Clendenning, also of Intel, was one of several presenters to discuss ALD of platinum, which has potential as a high workfunction material but which poses major integration challenges. Intel uses a unique approach with a remote ammonia plasma. Other presenters discussed the use of platinum plus oxidizers, a counterintuitive approach that also requires the use of a ligand as a reducing agent. The bottom line today is that there are ways to deposit platinum, but damage to the substrate is a challenge, as the oxidizer attacks the underlayer (Intel's approach was chosen in part because it does not oxidize the underlayer).
Also notable: a University of Minnesota presentation on phosphorous-doped zinc oxide films. While this particular type of ternary film isn't used in chipmaking, the concept was interesting, especially for DRAM applications.
Monday night's session was a very successful combination of a poster session and vendor exhibit, with cocktails and appetizers provided. The event was hopping, and crowded for pretty much the entire three hours. It's remarkable how many companies are getting into the space, including old-line names like Veeco, Kurt J. Lesker, and others. One important question in the air was support for high-volume manufacturing -- it's one thing to ship and support one tool, or even ten, but what happens when someone gets an order for 100? But concerns aside, there was great energy, and we're looking forward to Wednesday's sessions -- more to come!