Below 22nm, spacers get unconventional

01/13/2011

January 13, 2011 -- Spacers are considered "conventional materials," and thus an odd topic for the cutting-edge IEEE International Electron Devices Meeting (IEDM 2010). ASM CTO Ivo Raaijmakers points out that semiconductor fab below 22nm will require different processes for spacers: atomic layer deposition (ALD) and plasma-enhanced ALD (PEALD). He speaks with Debra Vogler, senior technical editor.

Listen to Raaijmakers speak: Download (For iPhone/iPod users) or Play Now

Among the reasons for using ALD/PEALD (Fig. 1) is lowering the temperature, and improving uniformity by controlling the series resistance of the device. One of the most important process knobs is chemisty choice. The Si precursor plus the nitrogen precursor, and the plasma are key parameters, explained Raaijmakers. Other important considerations include the use of a plasma and how intense that plasma is, and how much overlap you have between pulses to optimize TP in addition to optimized step coverage and layer uniformity.

  • New spacers supporting high-k - metal gate (HKMG) transitions for gate first 
    DRAM Perimeter, LSTP
    NAND Stacked Gate 
    FinFET 
  • Single atom uniformity levels for
    improved Xtor series resistance
    control 
  • Conventional materials like SiO, SiN(C)
    with novel low temperature PEALD
    processes, and metal compatible
    chemistries

PEALD in Production for Double
Patterning

Click to Enlarge

Scope of ALD Technologies

  • High-k gates/caps, Metal gates--Thermal ALD--Precise film control

 

  • Metal gates (TiN), eDRAM (TiN, ZAZ)--Batch ALD--Lowest cost

 

  • Double patterning spacers--Plasma ALD--Low temperature

HKMG spacer technology

Click to Enlarge

Figure 1. Plasma-enhanced atomic layer deposition (PEALD) technology for spacers. SOURCE: ASM

In the mid-term, Raaijmakers sees a change in architecture (FinFETs or FDSOI) (Fig. 2). For FinFETS, spacers will be even more important because of increasing aspect ratios. The transition from gate-first structures to replacement gate structures to control the workfunction will be key.

Click to Enlarge
Figure 2. CMOS transistor architecture roadmap. SOURCE: ASM  

Looking even further ahead, Raaijmakers notes that the move to new channel material to III-V or pure Ge will be very involved. "We will not only have to worry about high-k and metal gate (HK+MG), but also the interface between HK+MG and III-Vs, or pure Ge, and we have to be able to passivate the surfaces," said Raaijmakers. And though the whole process integration flow will have to change to accommodate the new channel materials, Raaijmakers does not see them being introduced for another 4-6 years.

Also see: Vogler’s interview with ASM’s Glen Wilk at IEDM.

Subscribe to Solid State Technology/Advanced Packaging.

Follow Solid State Technology on Twitter.com via editors Pete Singer, twitter.com/PetesTweetsPW and Debra Vogler, twitter.com/dvogler_PV_semi.

Or join our Facebook group

Font Sizes:

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. 


VIDEOS

Electroiq 2 EIQ2

TECHNOLOGY PAPERS

Automated Test Creation for Mixed Signal IP using IJTAG

The creation of test patterns for mixed signal IP has been, to a large extent, a manual effort. To improve the process used to test, access, and control embe...

Faster Time to Root Cause with Diagnosis-Driven Yield Analysis

This whitepaper describes the benefits of implementing a diagnosis-driven yield analysis flow using the Tessent® Diagnosis and Tessent YieldInsight® software...

WEBCASTS

Innovation in Semiconductor Manufacturing Instrumentation

As the industry is incorporating more MEMS devices with integrated magnetic sensors, they are encountering challenges that cannot be overcome with ...

3D and 2.5D Integration: A Status Report Live Event

This webcast will explore the present status of 2.5 and 3D integration, including TSV formation.

SUBSCRIBE

LATEST ISSUE

Volume 56, Issue 1

Article Archive for Solid State Technology.

© 2013. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS