April 12, 2010 - An EU-funded project has come one step closer to its goal of building silicon photonics circuits, with the creation of a fully CMOS-compatible laser source coupled to a silicon waveguide.

Using a circuit design from partners INL and IMEC, Leti says it has completed process studies for the laser source to adapt and modify standard III-V materials process steps compliant with a CMOS environment, replacing gold-based metal contacts with a Ti/TiN/AlCu metal stack on 200mm wafers in its facilities. Results are being presented this week at SPIE Photonics Europe 2010 in Brussels.

The work is part of the WADIMOS project (Wavelength Division Multiplexed Photonic Layer on CMOS), an EU-funded three-year project (total budget €3.2M) through 2010 seeking to solve problematic requirements with ever-beefier computing systems. The advent of multiprocessor systems and advanced manufacturing tools is ushering in an age of >100Tb/sec data transfer rates, needed on-chip (e.g., multicore processors) and/or off-chip in short-distance interconnects (10-100m).

The goal of WADIMOS is to devise, build, and demonstrate a photonic interconnect layer on CMOS with optical interconnects capable of handling such ultrahigh-speed data transfer rates. Final deliverables are pledged to be: a photonic interconnect layer with multichannel microsources, microdetectors and different advanced wavelength routing functions directly integrated with electronic driver circuits. (Last year WADIMOS participant IMEC tipped off some initial work with integrating photonic circuitry with high-speed CMOS.)

Two applications for silicon photonics are being pursued by the group. One is an optical network-on-chip (for WADIMOS participant STMicroelectronics) with photonic layer including complex wavelength division multiplexing functionality, both for increasing the data rate and for increasing the routing flexibility. Another application is a terabit-sized optical datalink for project participant Mapper Lithography, addressing the >100TB/s data rates requirements in moving litho patterns generated in the subfab to the actual litho equipment.

The WADIMOS partners, and their specific project tasks:

• IMEC (through the U. of Ghent's photonics research group): Project coordinator; design ultracompact SOI waveguide circuits for routing and demultiplexing; contribute to fabrication of the sources and integration with waveguides.

• STMicroelectronics: Investigate the viability of optical networks-on-chip, and design the required CMOS-circuits.

• CEA-Leti: Develop integration process and fabricate the photonic layer in a standard CMOS pilot line, including III-V based microsources.

• Lyon Institute of Nanotechnology (INL): Design and fabrication of microsource arrays; contribute to the optical network-on-chip studies; manage design of the optical routers.

• Trento University's (UNITN) silicon photonics group: Design optical WDM circuits based on coupled ring resonators.

• Mapper Lithography: Responsible for system studies related to the terabit optical link.