July 15, 2009 - Paul Siblerud of Semitool discusses 3D integration challenges and announces the latest news from the EMC-3D Consortium.
The purpose of the consortium is to integrate 3D technologies that are manufacturable and cost-effective, integrating many aspects of a difficult nature of through-silicon vias (TSV) to understand reliability and cost issues. Of the ~27 primary technologies involved in TSVs (most similar to silicon-based ones), four stand out as areas of challenge: etch (greater-than-normal aspect ratios, ~10:1), barrier/seed layers, electroplating using copper fill, and die-to-wafer pick-and-place.
Siblerud also shares some late-breaking news about the 3D consortium's future, which was originally to conclude in October of this year...but now seems bright for quite a bit longer.