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Semiconductors 2008 P

  • 03/03/2008 -- Wafer inspection firm Qcept adds more funding
    Mar. 3, 2008 - Qcept Technologies, an Atlanta, GA-based developer of surface inspection systems for semiconductor manufacturing, has raised another $9.5M in a Series C round of funding, led by previous investors (Siemens Venture Capital, along with Pittco Capital Management and others), bringing the overall total financing raised to roughly $25M.
  • 03/03/2008 -- SST On the Scene: SEMATECH's progress in immersion, EUV
    March 3, 2008 -- Stefan Wurm, program manager, EUV strategy at SEMATECH, updates Solid State Technology's Senior Technical Editor Debra Vogler on that group's progress in immersion lithography and EUV. Highlighted is progress on EUV mask defectivity and the first integrated chip with a layer made using EUV lithography. He also discusses the nanocomposite approach to high-index immersion lithography and the consortium's efforts to monitor non-optical lithography methods (e.g., NIL).
  • 02/29/2008 -- Zarlink: Take our analog fab, please!
    Feb. 29, 2008 - In what is essentially the last in a divestiture of its semiconductor foundry operations, Zarlink Semiconductor has sold its analog foundry in Swindon, UK to a subsidiary of domestic electronics component supplier MHS Electronics -- with a grand pricetag of €1 (~$1.51).
  • 02/28/2008 -- ASMI to stakeholder: No board changes
    Feb. 28, 2008 - In what is becoming a common sight on public newswires, another chip industry company is airing out some dirty laundry with an unusually public statement about internal affairs -- this time ASMI's rejection of a stakeholder's calls for replacing its board members.
  • 02/28/2008 -- SPIE: Tela Innovations lays it all out straight
    by M. David Levenson, Editor-in-Chief, Microlithography World At about the 90nm node, circuit features so much smaller than the exposure wavelength led to increased circuit variability, lithography hotspots, and limited yields (and applying restrictive design rules had limited success). Now, startup Tela Innovations is proposing a radical step to solve the industry's layout problems: employing pre-defined linear topologies, workable with 32nm and double-patterning and down to 22nm.
  • 02/27/2008 -- Tela funding tops $5M, includes Intel's VC arm
    Feb. 27, 2008 - Startup Tela Innovations says it has raked in about $5M in funding over two rounds since mid-2006, including an infusion from Intel's VC arm.
  • 02/27/2008 -- IBM, ASML, others gain SPIE Fellow honors
    Feb. 27, 2008 - Eight new Fellows have been added to SPIE's roster to honor their scientific and technical contributions in optics/photonics/imaging, and to the group in particular. Also, receiving awards at this year's SPIE Advanced Lithography symposium were researchers from ASML, IBM, KLA-Tencor, and the U. of Wisconsin/Madison.
  • 02/27/2008 -- SPIE: AMD, IBM tip first "full field" EUV chip
    by Bob Haavind, Editorial Director, and James Montgomery, News Editor, Solid State Technology Feb. 27, 2008 - AMD and IBM say they have produced a working 22mm x 33mm test chip built with 45nm process technologies using EUV lithography for the first critical layer of metal interconnects, pushing beyond previous EUV efforts that involved "narrow field" portions of the design.
  • 02/27/2008 -- SPIE: Philips, XTREME push EUV source to 500W
    Feb. 27, 2008 - Presenting at the SPIE Advanced Lithography Symposium, Philips Extreme UV and XTREME Technologies offered proof-of-principle experiment results showing their gas-discharge plasma source can be scaled to 100kHz operation frequency, which translates to a record 500W EUV source power -- more than enough to meet requirements for high-volume semiconductor manufacturing.
  • 02/27/2008 -- SPIE: SEMATECH starting imprint litho work, buys MII tool
    Feb. 27, 2008 - SEMATECH has purchased Molecular Imprints new Imprio 300 tool to demonstrate the feasibility of nanoimprint lithography for 32nm and below semiconductor production. Initial work will focus on demonstrating and enhancing overlay performance, and identify development areas to accelerate the introduction of the technology into manufacturing. Delivery is scheduled for mid-2008.

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