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Photovoltaics
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MEMS
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Semiconductors
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Packaging
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LEDs
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Displays
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Intersolar North America
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Energy Storage
Semiconductors 2008 P
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03/12/2008 -- SPIE report: Nonstarters, and dark options
by M. David Levenson, Editor-in-Chief, Microlithography WorldIntel chose this SPIE conference to present five papers on pixelated masks, an apparently abandoned program on pixelated masks that had pre-occupied litho engineers for several years. Elsewhere, prospects for high-index immersion technology seem to be dimming, and progress remains sluggish on a promising medium-throughput e-beam direct write for imprint litho. (Third in a four-part series) -
03/12/2008 -- SPIE report: ...and EUVL, eventually
by M. David Levenson, Editor-in-Chief, Microlithography World Progress continued in EUV lithography, but at a rate well below that needed for insertion at 32nm. AMD described the patterning of an entire metal-1 layer for a full exposure field chip and the integration of EUVL into the process flow. Sources remain an issue, though some think solid state lasers could help improve efficiency. Others are thinking ahead to 22nm. (Second in a four-part series) -
03/12/2008 -- SPIE report: Getting ready for double patterning...
by M. David Levenson, Editor-in-Chief, Microlithography WorldSince high-volume EUV lithography is delayed, the first 32nm generation chips will have to be printed with double patterning technology (DPT) for critical layers and much of the conference focused on the various options, none of which seemed fully developed. (First in a four-part series) -
03/12/2008 -- Analyst downgrades semi wafer outlook; still "balancing" solar industry, biz growth
Mar. 12, 2008 - A report from FBR Research says wafer sales to the semiconductor industry should decline about 6%-7% in 1Q08, but that will be cancelled out by strength in the spot market and by solar wafer demand, and that MEMC's strategy of signing long-term solar contracts over currently surging spot market prices is still an attractive model. -
03/12/2008 -- SPIE report: Cleverness, and a computational arms race
by M. David Levenson, Editor-in-Chief, Microlithography World Avoiding unprintable structures will be essential for manufacturing 45nm and smaller circuits, and that was reflected in a series of papers on design for manufacturing and design rule restrictions, some of them quite aggressive. (Fourth in a four-part series) -
03/11/2008 -- SEMATECH's Arkalgud: A 3D/TSV route to higher IC densities
by Bob Haavind, Editorial Director, Solid State TechnologyAn insightful update on three key semiconductor technologies -- SOI, TSV/3D, and SOI -- sparked a lively Q&A following a SEMI-sponsored breakfast near Boston (Mar. 5). Here, Sitaram Arkalgud, head of SEMATECH's 3D interconnect program in Albany, discusses the expected evolution of through-silicon vias (TSVs) and 3D chip stacks for future electronics. -
03/11/2008 -- U. Albany's Denbeaux: EUV works, though far from what's needed
by Bob Haavind, Editorial Director, Solid State TechnologyAn insightful update on three key semiconductor technologies -- SOI, TSV/3D, and SOI -- sparked a lively Q&A following a SEMI-sponsored breakfast near Boston (Mar. 5). Here, Gregory Denbeaux, assistant professor of nanotechnology at the U. of Albany, gave an overview of progress needed in EUV to make it suitable for high volume manufacturing. -
03/10/2008 -- Analyst: 2Q holds key to 2008 chip industry growth
Mar. 10, 2008 - The current sluggish growth and mounting economic worries are calling into question whether the semiconductor industry can regain momentum and manage any growth this year, and the second quarter -- traditionally a period of accelerating growth -- will be the key, according to a recent report by iSuppli. -
03/10/2008 -- TSMC, SanDisk working on 45nm NAND
Mar. 10, 2008 - SanDisk and TSMC have verified SanDisk's 80nm OTP NAND chip at TSMC, and the two firms are now progressing to 45nm chip development -- work that is raising industry eyebrows since Spansion is also a top TSMC client with its competitive ORNAND chips, according to the Taiwan Economic News. -
03/10/2008 -- Reports: Hynix eyeing ProMOS tech transfer, Samsung steamed
Mar. 10, 2008 - Hynix Semiconductor reportedly is in negotiations to send 54nm DRAM process technology to Taiwan's ProMOS, a year after a similar deal for 66nm process technology raised eyebrows.
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