Packaging 2008 P

06/20/2008 -- SEMI: Monthly tool demand slips to three-year lows
June 20, 2008 - Offering more evidence for chipmakers' belt-tightening this year, semiconductor equipment demand has slumped to three-year lows, to levels not seen since mid-2005, according to the latest monthly data from SEMI.
06/17/2008 -- Report: Japan chip tool firms' foreign ownership on the rise
June 16, 2008 - Foreign ownership of Japanese frontend process semiconductor equipment firms rose in the fiscal year ended in March, while the opposite was true for domestic firms serving the backend of the manufacturing line, noted the Nikkei daily.
06/17/2008 -- Unisem, Flip-Chip ink WLP licensing deal
June 16, 2008 - Unisem Berhad and subsidiary Unisem-Advantpack Technologies (UAT) have agreed to license FlipChip International's wafer bumping and wafer-level packaging technologies, in exchange for a stake in UAT. The deal is seen as expanding Unisem's technology offerings, while broadening FlipChip's customer reach.
06/03/2008 -- IITC shows the way to 3D
by Ed Korczynski, senior technical editor, Solid State Technology The 11th International Interconnect Technology Conference (IITC) is now underway in Burlingame, CA, presenting the leading-edge of on-chip interconnect technology developments with details on new materials, processes, and structures. 3D interconnects and through-silicon vias are being discussed in serious detail, while work continues on air-gap dielectrics and carbon nanotubes along with new copper barrier materials.
05/23/2008 -- Startups hit the fast track at UK event
by Françoise von Trapp, managing editor, Advanced Packaging May 23, 2008 - Five silicon startups were introduced at the recent Born Global! event in Bath, UK, part of a program that aims to help startups clear an early strategic hurdle that can inhibit their interaction with potential customers and partners. Two of this year's participants, Robert Beat (Silicon Basis) and Nick Weiner (Xintronix), talked to SST about the FASTtrack program and their companies' goals.
05/22/2008 -- CNT-asbestos links point to need for more research, say experts
by James Montgomery, News Editor, Solid State Technology May 22, 2008 - A new report published in the journal Nature Nanotechnologies is raising alarms about apparent health risks associated with carbon nanotubes (CNT), similar to those seen with asbestos. But efforts are already underway to look more closely at potential issues, according to Walt Trybula, former SEMATECH immersion lithography guru and now at Texas State U., in an email exchange with WaferNEWS.
04/18/2008 -- SEMI: March tool demand takes a step back
Apr. 18, 2008 - Even the quarterly-ending month couldn't muster enough strength to give the industry a positive boost, as demand continues to show softness in the semiconductor equipment sector, according to the latest data from SEMI.
03/04/2008 -- Fujitsu touts lower-temp CNT-graphene composite
Mar. 4, 2008 - Fujitsu Labs says it has successfully created a nanoscale carbon composite with a self-organizing structure by combining carbon nanotubes and graphene, combining CNTs' high thermal conductivity and high-current density tolerance with graphene's high electron mobility. The composite is synthesized at 510°C, cooler than temperatures for conventional graphene that are too high for electronic device applications.
02/29/2008 -- SST On the Scene: Lars Liebmann on DFM, scaling
Feb, 29, 2008 - In this exclusive video interview, IBM's Lars Liebmann talks about his papers presented at this week's SPIE, including persistent misconceptions about restricted design rules, and the need for designers to react to systematic and stable effects with broad, coarse layout adjustments vs. minor movements based on a specific moment. He also discusses the opportunities at 22nm with "soft" and "hard" DFM, and how these concepts will be required to keep the scaling path profitable.
02/27/2008 -- Rohm & Haas, IBM eye Cu CMP for 32nm-22nm
Feb. 27, 2008 - Rohm & Haas Electronic Materials/CMP Technologies and IBM are adding to their collaborative plate, with a pact to develop CMP processes for integrating copper and low-k dielectrics, in order to create copper CMP consumables for 32nm and 22nm device manufacturing.

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