Toshiba, Sony develop low-power transistor

12/11/2001

Dec. 11, 2001 - Tokyo, Japan - Toshiba Corp., and Sony Corp. have jointly developed a next-generation transistor enabling high-speed operation and low power consumption, according to the companies.

The new transistor uses 0.10-micron technology, the Nihon Keizai Shimbun reported. As a result, its operating speed is faster than that of conventional transistors.

In addition, researchers from the two companies modified the structure to minimize electric current leaks at such places as the gate and drain when the transistor is off, the companies said. Moreover, phosphorus was used as the dopant instead of the traditional arsenic, reducing the rate of defects at the junction, the primary cause of electric current leaks.

The new transistor can easily be integrated into the same chips as large-capacity DRAM necessary in graphics processing and analog circuits indispensable for data communications, the companies said.

Toshiba and Sony aim to commercialize the transistor as early as September 2002 for use in system chips for advanced cellular phones.

Font Sizes:

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. 


VIDEOS

Electroiq 2 EIQ2

TECHNOLOGY PAPERS

Automated Test Creation for Mixed Signal IP using IJTAG

The creation of test patterns for mixed signal IP has been, to a large extent, a manual effort. To improve the process used to test, access, and control embe...

Faster Time to Root Cause with Diagnosis-Driven Yield Analysis

This whitepaper describes the benefits of implementing a diagnosis-driven yield analysis flow using the Tessent® Diagnosis and Tessent YieldInsight® software...

WEBCASTS

Innovation in Semiconductor Manufacturing Instrumentation

As the industry is incorporating more MEMS devices with integrated magnetic sensors, they are encountering challenges that cannot be overcome with ...

3D and 2.5D Integration: A Status Report Live Event

This webcast will explore the present status of 2.5 and 3D integration, including TSV formation.

Questions and answers on FD-SOI

Fri Jan 04 14:56:00 CST 2013

Present your ideas at The ConFab in 2013

Mon Nov 26 09:04:00 CST 2012

The ConFab 2013 countdown begins

Thu Aug 09 16:18:00 CDT 2012

The ConFab: Big data is here

Sun Jun 03 19:19:00 CDT 2012

Oh, snap!: Pics from The ConFab

Sun Jun 03 19:09:00 CDT 2012

SUBSCRIBE

LATEST ISSUE

Volume 56, Issue 1

Article Archive for Solid State Technology.

© 2013. PennWell Corporation. All Rights Reserved. PRIVACY POLICY | TERMS AND CONDITIONS