Increasing power levels and power density requirements for multiple end products means that high-power semiconductor modules and components are often assembled using a clip-bonding technology.
In the March 2007 cover story, we asked the industry about the demands that new packages placed on sockets, lead-free issues, standards, cost control, fine pitch, and the overall consensus on the Burn-in & Test Sockets Workshop (BiTS) where users talk to suppliers.
A well-designed thermal management system involves efficient heat-dissipating components such as heatsinks, air or liquid cooling pipes, and fans. To maximize heat dissipation, choosing the right thermal interface material (TIM) is critical.
One of the most important measurements when designing an automated optical inspection (AOI) of solder bumps is bump coplanarity. Remarkably, the appropriate JEDEC specification (JESD22-B108A) defines bump coplanarity in a way that could give misleading results.
Flip chip on substrate assembly has been a placid technical field, with a mainstream high-volume manufacturing process carefully shepherded by production engineers towards raising yields and increasing line throughput.
