Georgia Tech, Endicott Interconnect to develop packaging concepts
ENDICOTT, N.Y. — Endicott Interconnect Technologies Inc. has teamed up with the Georgia Institute of Technology's Packaging Research Center (PRC; Atlanta, Ga.) to develop and manufacture new packaging concepts for the electronics industry.
Georgia Tech's PRC pioneered a system-on-package (SOP) concept that integrates RF, optical and digital functions into modules or microminiaturized boards to enable the total convergence of computation, communication and consumer functions into single packages or modules.
The PRC, which focuses on the academic research frontiers for electronic packaging and their proof-of-concept, is using its 300-mm SOP fab with a special focus on organic materials. Endicott Interconnect will translate those efforts into early user hardware and volume production.
"SOP is to systems as ICs are to transistors. In SOP, the package is the system-and the system is more than a computing, communication, biomedical or consumer system," explains professor Rao Tummala, the director of PRC. "EI and PRC are ideal partners for pioneering of SOP research, development and commercialization."
Funding for the PRC is provided by the U.S. National Science Foundation and the State of Georgia.
WSTS Forecasts Market Growth Ahead
BRUSSELS, BELGIUM — The World Semiconductor Trade Statistics (WSTS) has released its Fall 2003 forecast, which says market indicators point to growth from 2003 through 2005. The market should grow 14.2 percent in 2003, according to the forecast, to $160.7 billion. Growth is expected to reach a healthy 19.4 percent to $191.9 billion in 2004. In 2005, growth of 12.6 percent is predicted to reach $216.1 billion — this would beat the record of 2000 when the market reached $204.4 billion. A moderate downturn is foreseen in 2006, the end of the forecast timeframe, with total worldwide sales ending still above the market high of 2000.
Unlike 2002, when the market increased only in Asia/Pac, all regions are returning to growth in 2003 and 2004. In Asia/Pac, the market should grow 18.2 percent in 2003, and 22.7 percent next year. In the meantime, the forecast is 22.5 percent in 2003 and 19.2 percent in 2004 for Japan. For the Americas, growth is expected at 0.8 percent in 2003, and 17.4 percent in 2004. In Europe, the market should see growth of 12.8 percent in 2003, and 15.1 percent in 2004. It is worth noting, however, that the Euro/$ exchange rate is significantly boosting the growth of the European market in 2003, which should be negative in Euro (-4.7 percent). By 2006, Asia/Pac is expected to increase its share of the worldwide market to 40.1 percent from 37.6 percent in 2003, at the expense of Japan (from 23.2 to 22.7 percent), Americas (from 19.6 to 18.6 percent) and Europe (from 19.5 to 18.6 percent).
Scientists Solve 20-year-old Electronics Puzzle
NEWCASTLE UPON TYNE, U.K. — Gold is used extensively in the electronics industry as a relatively stable conductor of electricity for products such as computers, mobile phones and smart cards, with one great drawback — it's one of the most expensive metals on the market.
Researchers have attempted (and failed) to make gold nitride for the past 20 years, until now. A scientist at Newcastle University's School of Chemical Engineering and Advanced Materials, Lidija Siller, Ph.D., reports that she has successfully created gold nitride she believes is harder and more durable than gold alloys currently available on the market. This could translate into much thinner gold plating layers, which would reduce manufacturing costs for the electronics industry. Newcastle University has filed a patent for the gold nitride process, while Siller continues to make further modifications to the substance to test whether it will have widespread use in industry.
Amkor Completes Qualification
CHANDLER, ARIZ. — Amkor Technology Inc. recently completed qualification of two IC packaging solutions in its J1 factory in Kitakami, Iwate-Prefecture, Japan. The company's 'Stacked Chip Scale Package' combines thin-core substrates, silicon wafer thinning and film die attach. Its 'Very Thin ChipArray Ball Grid Array' is a chip scale package that consists of a thin-core, two-metal-layer, rigid laminate substrate and a thin molded cap.
Amkor plans to introduce more adva-nced die stacking technology in Japan to support the local market. By early 2004, its factory in Japan is expected to support back-grinding wafers to 3 mils — enabling implementation of even thinner die and packages.
SIA Urges Chinese to Drop Value-added Tax
SAN JOSE, CALIF. — The Semiconductor Industry Association (SIA), in a recent study of China's emerging semiconductor industry, urges China to change its "discriminatory value-added tax (VAT)." The VAT, reports SIA, is a rebate scheme that distorts trade investments and imposes a cost penalty for semiconductor importers trying to compete for sales in China.
China is currently the world's most rapidly growing market for semiconductors and ranks as the world's third largest market, with $19 billion in sales. The Chinese government, according to the findings of the SIA study, provides income tax holidays to factories located in China, tax incentives for individuals, and manpower and education programs. With the exception of VAT, the study does not criticize industrial promotional efforts by China as a general matter.
"The SIA supports open markets for all semiconductor products, thus providing consumers access to the best technology and the most competitive pricing from semiconductor companies throughout the world," says SIA President George Scalise. "The SIA supports the U.S. government's bilateral efforts with China to eliminate any discrimination against imported semiconductor devices created by the implementation of its VAT."
China currently provides VAT rebates on semiconductor products manufactured and sold within the country while continuing to charge the full VAT on imported semiconductor products. China applies a VAT of 17 percent on sales of imported and domestically produced semiconductors. However, in June 2000, China's State Council announced that all ICs manufactured in China would receive a rebate of the VAT in excess of 6 percent of the company's tax burden. The policy was amended in September 2001, with an announcement that ICs both designed and built in China would be eligible for rebate of the VAT in excess of 3 percent. VAT rebates must be applied to R&D or capital expenditures within China.
The Chinese implementation of its VAT, according to SIA, pressures foreign semiconductor makers to design and manufacture their products within China, or face a cost penalty. The World Trade Organization doesn't allow countries to eliminate tariffs on the one hand, while imposing a tax applied disproportionately on the other.
Cochlear Uses Tessera's Packaging Technology
SAN JOSE, CALIF. — Cochlear Ltd. has licensed Tessera's semiconductor packaging technology for use in its implantable hearing devices that are designed to allow individuals with severe to profound hearing loss to perceive sound.
Included in Tessera's license agreement with Cochlear are more than 150 patents covering Tessera's Compliant Chip technology. This technology spans a broad range of chip-scale and multi-chip package types, including IC devices packaged in "face down," "face up," "fold-over," "stacked" and "system-in-package" formats.
IMEC, EV Group Work on Wafer-level Packaging
SCHÄRDING, AUSTRIA — A collaboration agreement on wafer-level packaging and MEMS bonding is bringing together EV Group, an Austria-based manufacturer of MEMS and wafer processing equipment, and IMEC, a Belgium-based independent research institute on microelectronics and micro/nanotechnology.
The duo intends to tackle roadblocks in the further downscaling of IMEC's thin-film multilayer technology below 5-micron-wide line and space interconnects. They also plan to develop 0-level packaging techniques for MEMS devices, aimed at achieving simple and cheap polymer bonding processes on 200-mm wafers.
University of Texas, Optonics Form Partnership
MOUNTAIN VIEW, CALIF. — Optonics Inc., a photon emission-based optical diagnostic company, has formed a technology partnership with the Microelectronics Research Center at the University of Texas (UT) at Austin. As part of the partnership, Optonics is donating semiconductor equipment to UT for education, research and training. The partnership will focus on the development of photon counting detector technology for ICs.
The emergence of flip chip packaging and the use of multiple metal layers in leading-edge IC designs have led to a need for new fault isolation techniques. With backside optical fault isolation technologies, design engineers can troubleshoot complex problems. The use of time-resolved photon emission technology allows performance to be measured at the critical node level and helps to identify timing faults and manufacturing defects. Enhanced debug capabilities offered by optical diagnostic tools, according to Optonics, can shorten the post-silicon design debug and yield analysis cycle, speeding time-to-market and lowering device development costs.
Sold! Speedline Goes to KSP for $10 Million
NEW YORK, N.Y. — KSP Special Situations Fund II recently spent $10 million to buy the stock and related assets of Franklin, Mass.-based Speedline Technologies Inc., a producer of manufacturing equipment and services for the printed circuit board and semiconductor packaging industries, from Cookson Group.
KSP acquired the stock and related assets of Speedline through a newly formed company. The company intends to invest "substantial" capital to fund working capital requirements at Speedline. KSP reports that Speedline's name will not change, and the company will continue under the same management.
FSA Establishes Asia-Pacific Headquarters
TAIPEI, TAIWAN — The Fabless Semiconductor Association (FSA) has established Asia-Pacific headquarters in Taiwan to expand its global presence to provide a united, global voice to address the challenges and opportunities for fabless and hybrid semiconductor companies. Jeremy Wang, Ph.D., FSA's newly appointed Asia Pacific executive director is leading this initiative.
Taiwan was identified as the best location for the Asia-Pacific headquarters based on its number of fabless companies and leaders; strong fabless start-up activity; sophisticated infrastructure; burgeoning support for innovation and value-added design; and the leading foundries' representation in this region.
End in Sight for Compound Semiconductor Slump?
LITTLE FALLS, N.J.— The rough ride the semiconductor industry has endured the past few years is showing signs of recovery. Stock prices are going up, even if revenues are still lower than they were before the tech bubble burst in 2001.
For suppliers of compound semiconductors in particular, the end of the bust cycle is critical. A study recently released by Kline & Co., an international business consulting firm, predicts that the light at the end of the tunnel is now visible — even though the tunnel exit still looks far away.
"The suppliers we surveyed for our study told us that their customers have finally been asking for new products to test again," says Li Wang, engagement manager in Kline's Electronic Chemicals and Materials Practice. "While this won't necessarily mean an immediate increase in orders, at least it's something."
After the entire electronics industry suffered substantial losses through 2000 and 2001, the market for compound chips dropped further in 2002, by about 7 percent. The study predicts a gradual recovery with growth of 15 percent a year through 2007 — based on a commitment by fabricators to spend money on development, even though their revenues have taken a serious beating over the past couple of years.
Die Products Consortium Presents Leadership Awards
AUSTIN, TEXAS — The Die Products Consortium (DPC) recently honored GEL-PAK Inc., 3M, National Semiconductor and Minco for their ongoing contributions. This year marked the 10th anniversary of the DPC's annual Known Good Die Workshop, which is dedicated to packaging and test applications related to die products (bare die, flip chip and wafer level chip scale packages). Current members include: Agilent Technologies, Analog Devices, August Technology, Chip Supply, IBM, Intel, LSI Logic, Motorola, National Semiconductor, Philips Semiconductors, Samsung Electronics and Texas Instruments.
MOVERS AND SHAKERS
Meng-Hee Teng is the new vice president and general manager of North Asia sales at ASAT Holdings Ltd. In this position, based in Hong Kong, China, Teng is responsible for all aspects of sales and customer service in North Asia.
GE Global Electronics Solutions appointed Roger Innes as managing director of Capital Markets and Business Expansion. Innes is responsible for ensuring continued growth through co-investor alliances in existing and emerging markets in the U.S., Asia and Europe. Building upon his experience in the technology equipment leasing and finance industries, Innes will also assist in the origination of new client partnerships in every aspect of the equipment lifecycle management process, including acquisition, optimization and disposition.
Advanced Interconnect Technologies (Pleasanton, Calif.) recently received a '2003 Absolute Zero Defect Award' from Delphi Delco Electronics Systems (Troy, Mich.) for its "flawless" assembly of small outline ICs. The award is presented annually to suppliers that demonstrate zero defects during the year.
Jazz Semiconductor (Newport Beach, Calif.), a wafer foundry, and China's Hua Hong Group, a pure play IC foundry, have entered a joint venture that significantly increases Jazz's capacity for digital, analog, and RF CMOS processes, as well as silicon germanium bi-CMOS.
Sonoscan Silicon Valley (Santa Clara, Calif.), a regional applications and testing laboratory of Sonoscan Inc., has expanded and moved to new quarters. Their new address is 1500 Wyatt Drive, Suite 15, Santa Clara, CA 95054.
Fujitsu Ltd. (Tokyo, Japan) consolidated its four back-end assembly and testing subsidiaries in Japan into one newly established company with four facilities. The new company, Fujitsu Integrated Microtechnology Ltd., is offering a variety of assembly and testing services, extending from high-end chip packages for servers and networking equipment to commodity and multi-chip packages for digital audio-video equipment, mobile phones and in-car systems.
Olympus Optical Co. Ltd. (Tokyo, Japan) has formed a MEMS Technology Division that will unify all the company's previous activities, including R&D and MEMS foundry services. Although Olympus has been active in the R&D of MEMS and related products for more than 10 years, the reorganization will allow the company to improve and expand its MEMS technology and foundry capabilities. Olympus' facilities for MEMS assembly will be increased by 30 percent, and R&D is being given increased priority and focus.
ST Assembly Test Services Ltd. (Singapore and Milpitas, Calif.), an independent semiconductor test and advanced packaging service provider, has moved its Singapore corporate office to a new location, making way for additional manufacturing capacity at its current facility. The move, which took place on November 3, 2003, involved 200 general administrative and support staff, including sales and marketing, information technology, finance and human resources. STATS' customer service, assembly and test operations continue to be housed at its current manufacturing facility at 5 Yishun Street 23, where an estimated 45,000-sq.-ft. is being converted for operations purposes. The new corporate location is 10 Ang Mo Street 65.