September 4, 2012 - Ultra Tec Manufacturing has released a new endpoint detection module for its ASAP-1 IPS selected area preparation system, for improving electronic package decapsulation and sample preparation.
The patent-pending hardware/software enhancement to the ASAP-1 IPS provides the capability to quantify and act upon the capacitive and/or resistive properties of electronic device and packaging materials, in order to enhance the sample preparation process. Such "controlled microsurgery" with interactive endpinting opens the door for improved resolution in various microscopy techniques (SQUID, INSB thermography/lock-in, thermal laser stimulus) without fully exposing the die topside or by stopping a few microns before target on silicon from the backside.
Ultra tec's ASAP-1 IPS is a digital sample preparation system for the decapsulation, thinning and polishing of packaged and wafer-level devices. The new endpoint module will be available for demos at the upcoming International Symposium for Testing and Failure Analysis (ISTFA) conference in Phoenix, AZ, Nov. 11-15).
A 4 × 4mm pocket area backside thinned into an IC on a deliberate tilt
to confirm endpoint capability. The indicated spot shows the thinnest
remaining silicon (2.5μm) on the left. The upper image shows the
fringes at 1064nm and the lower image is a C-SPM image of the area
of interest, also produced on the ASAP-1 IPS system. (Source: Ultra Tec)
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