July 5, 2011 - On June 27th Elpida Memory announced that it had begun sample shipments of DDR3 SDRAM (x32-bit I/O configuration) made using through-silicon via (TSV) stacking technology. The device, according to the company, is a "low-power 8Gb DDR3 SDRAM that consists of four 2Gb DDR3 SDRAMs fitted to a single interface chip using TSV."
Target applications reportedly include tablet PCs, extremely thin PCs, and other mobile computing systems. The new TSV DRAM will reportedly enable significant energy savings as well as making portable electronic devices smaller, thinner and lighter. Elpida believes that the new devices in notebook PCs will demonstrate a 20% reduction in operating power and a 50% reduction in standby power compared with systems that use the standard SO-DIMM configuration which use standard wire bonding technology. Power consumption is reduced because the TSVs shorten the interconnect between the chips, thus reducing parasitic resistance and capacitance.
In addition, chip height is decreased and the DIMM socket is eliminated. Chip mounting area is reportedly reduced 70%.
Exactly one year ago, Elpida Memory, Powertech Technology (PTI), and United Microelectronics Corporation (UMC) announced a three-way 3D IC partnership to leverage the strengths of Elpida's DRAM, PTI's assembly, and UMC's foundry logic technologies to develop a total 3D IC Logic + DRAM integration solution. That partnership was finalized last month.
Elpida began developing TSV technology in 2004 on a Japanese grant from NEDO (the New Energy and Industrial Technology Development Organization). In 2009 it demonstrated the industry's first TSV DRAM based on stacking together eight 1GB DDR3 SDRAMs.
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